Flash Controller Read Voltage Calibration for Low-Latency SSD Reads

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Solution Overview

Problem

Data read latency and instability in SSDs due to variations in threshold voltage of flash memory cells, leading to increased read retries and reduced throughput in information processing.

Innovation Solution

Implementing regular data read at predetermined intervals to determine and record an optimal read voltage based on the result of the data read, minimizing latency and stabilizing information processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data read is performed multiple times at adjusted read voltages to handle threshold voltage variations, then data read reliability is improved, but data read latency increases and throughput decreases

Engineering Contradiction:
Improvedata read reliabilityVSAvoiddata read latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs a preliminary data read operation at predetermined intervals to detect threshold voltage variations and determine the appropriate read voltage in advance. This preliminary action ensures that when actual data read is needed, the correct read voltage is already established, eliminating the need for multiple retry attempts and reducing latency while maintaining reliability

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If read voltage is adjusted multiple times to compensate for threshold voltage variations, then data read accuracy is improved, but information processing throughput deteriorates

Engineering Contradiction:
Improvedata read accuracyVSAvoidinformation processing throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The system performs preliminary read operations at predetermined intervals to establish the correct read voltage before actual data processing begins. This preliminary calibration ensures high read accuracy is achieved without requiring multiple voltage adjustments during active processing, thereby maintaining high throughput while ensuring measurement precision

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements periodic data read operations at predetermined intervals to refresh and update the read voltage settings. This periodic maintenance approach ensures read voltage accuracy is maintained over time without continuously impacting throughput, as the adjustments are made periodically rather than with every read operation

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Reduces data read latency and stabilizes information processing by optimizing read voltage settings, thereby reducing the need for lengthy read retries and maintaining throughput.

Implementation Method 1

Data write into a flash memory is performed by accumulating an electric charge according to a write value in the floating gate of each memory cell

Methodology Applied
Scientific EffectElectric charge accumulation: Capacitance

Implementation Method 2

At the time of data read, a value is identified on the basis of the magnitude relation between a threshold voltage corresponding to the accumulated electric charge and a read voltage to be applied to the control gate

Methodology Applied
Scientific EffectThreshold voltage detection: Electric Field

Data Source

PatentUS20260066005A1Information processing device and memory management method
Publication Date: 2026.03.05 SONY INTERACTIVE ENTERTAINMENT LLC
  • US20260066005A1 patent drawing
  • US20260066005A1 patent drawing
  • US20260066005A1 patent drawing

AI summary

A flash controller of an information processing device regularly implements data read for each of block groups corresponding to ellipses 150, 152, and 154 across channels ch0 to ch3 of a flash memory. Read is tried at varied read voltages until data with an error rate which is equal to or lower than a threshold can be read, and a read voltage that is obtained in the end is stored in the memory. At the time of normal data read, data is read by using a read voltage associated with a target block.