Flash Memory Demapper Circuit for Non-Linear Charge State Mapping
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Solution Overview
Problem
Existing storage devices face challenges in efficiently converting stored analog values into probabilistic representations for error correction and data retrieval, particularly in flash memory systems where the non-linear characteristics of storage transistors complicate the mapping of charge states to reliable symbolic values.
Innovation Solution
The implementation of a demapper circuit with S-shaped or piecewise linear mapping functions that convert differential current from storage transistors into probabilistic outputs, allowing for accurate representation of storage states as probabilities or log likelihood ratios, which can be used for error correction and data retrieval in flash memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional reading circuitry is used to sense storage states, then the device structure remains simple, but the non-linear characteristics of storage transistors cause inaccurate conversion of charge states to symbolic values
Solution Approach 1:
The patent introduces a demapper circuit as an intermediary component between the storage transistors and the data retrieval system. This demapper performs the non-linear mapping function that converts sensed charge values into accurate probabilistic representations, resolving the non-linearity issue without requiring fundamental changes to the storage transistor characteristics or the basic reading circuitry.
Solution Approach 2:
The patent transforms the storage state representation from direct charge values to probabilistic parameters (log-likelihood ratios). By changing the parameter domain in which the data is represented and processed, the system can accurately handle the non-linear characteristics of the storage transistors while enabling efficient error correction decoding.
2Reliability
If probabilistic representations are used for error correction, then data reliability improves, but the processing complexity increases
Solution Approach 1:
The patent replaces complex iterative probabilistic processing with a single-pass analog computation system. The demapper circuit directly computes log-likelihood ratios from sensed charge values using analog circuitry, eliminating the need for complex iterative software-based decoding algorithms while maintaining high data reliability.
3Quantity of substance
If multiple storage states are used to increase capacity, then storage density improves, but the difficulty of accurate mapping increases
Solution Approach 1:
The patent segments the mapping function into manageable components within the demapper circuit. For multiple storage states, the demapper processes each state transition separately, computing log-likelihood ratios for each possible symbol value. This segmentation makes the complex mapping of multiple charge states to symbolic values tractable and accurate.
Data Source
AI summary
In one aspect, a storage device includes a plurality of storage strings, each comprising a serial interconnection of a plurality of active storage elements, each storage element having a part for maintaining a storage state and a part of modulating a current through the element according to the storage state. The device also includes mapping circuitry for selectively sensing a storage state of a storage element in a storage string by forming current though the storage element that is a non-linear function of the storage state. In some examples, the mapping circuitry comprises reference string of active elements, and the mapping circuitry selectively senses a storage state by forming a difference in currents in the sensed storage string and in the reference string that is a non-linear function of the storage state. In some examples, the active storage elements comprise floating gate transistors.