Flash Interface Signal Calibration Using Two-Stage Eye Diagram Search
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Solution Overview
Problem
NAND flash memory access performance is limited by its serial access nature, requiring improvements in data transmission efficiency and accuracy.
Innovation Solution
A two-stage search mechanism for calibrating flash interface signals, involving a first low-speed and then a high-speed calibration process to determine optimal reference voltages and time offsets for stable and high-speed data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data transmission operates at high speed, then productivity is improved, but reliability deteriorates due to signal instability and transmission errors
Solution Approach 1:
The patent performs preliminary calibration of reference voltage and time offset parameters before high-speed data transmission. The calibration process establishes optimal signal parameters by generating eye diagrams and determining center points, ensuring reliable transmission before productivity-critical operations begin.
Solution Approach 2:
The patent dynamically adjusts signal parameters (reference voltage and time offset) based on calibration results. By changing these parameters to optimal values determined through eye diagram analysis, the system achieves both high-speed transmission and maintained reliability.
2Productivity
If signal calibration is performed at high speed, then productivity is improved, but measurement precision deteriorates due to insufficient sampling and analysis accuracy
Solution Approach 1:
The patent divides calibration into two distinct stages: low-speed calibration for accurate eye diagram generation and measurement, then high-speed calibration for final parameter optimization. This segmentation allows each stage to focus on its strength—accuracy in the first stage, speed in the second.
Solution Approach 2:
The low-speed calibration stage serves as a preliminary action that establishes accurate baseline measurements and eye diagrams. This preliminary accurate measurement enables the subsequent high-speed stage to achieve both speed and precision by refining parameters based on the established baseline.
3Productivity
If a single-stage high-speed calibration is performed, then productivity is improved, but reliability deteriorates due to lack of accurate baseline measurements
Solution Approach 1:
The calibration process is segmented into two speed stages, each serving a specific purpose. The low-speed stage ensures reliable baseline measurements, while the high-speed stage optimizes for final performance. This segmentation resolves the contradiction between efficiency and accuracy.
Solution Approach 2:
The patent performs more calibration than a single-stage approach would suggest by adding the preliminary low-speed stage. This excessive action in terms of process steps ensures accurate baseline measurements, which ultimately enables more reliable high-speed operation.
Data Source
AI summary
The invention introduces a method for calibrating signals with a flash interface, performed by a processing unit of a flash controller, to include: directing data transfer between the flash controller and the flash module to operate at a first speed; executing a first search algorithm to generate a first eye diagram for successfully completing data transmission under the first speed; obtaining a second reference voltage and a second time offset that are closet to a center point of the first eye diagram; directing data transfer between the flash controller and the flash module to operate at a second speed; executing a second search algorithm to generate a second eye diagram for successfully completing data transmission under the second speed; obtaining a third reference voltage and a third time offset that are closet to a center point of the second eye diagram as calibrated ones.