Flash Memory Access Controller for Multi-Core Conflict Avoidance

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Solution Overview

Problem

In embedded devices with multiple software subsystems running on a single chip, conflicts arise when these subsystems access the same flash memory, leading to exceptions and inefficiencies.

Innovation Solution

Implementing an access controller with independent power supply and sorting capabilities to manage access requests from multiple processor cores, ensuring sequential processing and address space allocation to prevent conflicts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If multiple software subsystems access the same flash memory simultaneously, then the flash memory can be shared and chip area is reduced, but conflicts occur causing software subsystem exceptions

Engineering Contradiction:
Improvechip areaVSAvoidsoftware subsystem stability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

An access controller is introduced as an intermediary between multiple processor cores and the flash memory. The access controller receives access requests from different processor cores, sorts them according to a flash memory access policy, and sequentially processes them. This mediator prevents direct conflicts while enabling shared access to the same flash memory device, thus reducing chip area while maintaining software subsystem stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If each software subsystem has its own flash memory controller, then access conflicts are avoided, but chip area and costs increase

Engineering Contradiction:
Improveaccess conflict avoidanceVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The access controller is designed with multi-functionality to serve multiple software subsystems simultaneously. It can receive access requests from different processor cores, identify the corresponding software subsystems, sort requests based on their priorities and policies, and sequentially process them. This universal controller eliminates the need for multiple dedicated flash memory controllers, reducing chip area while preventing access conflicts through centralized management.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Use of energy by moving object

If the access controller shares power supply with processor cores, then power consumption is reduced, but access controller cannot operate independently when processor cores are powered down

Engineering Contradiction:
Improvepower consumptionVSAvoidindependent operation capability
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The power supply system is segmented into separate power domains. The access controller has its own independent power supply, distinct from the processor cores. This allows the access controller to remain powered on and operational even when processor cores are powered down, enabling scenarios where the access controller can independently manage flash memory access, such as during boot processes or when one subsystem is inactive while another is active.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12430242B2Flash memory access method and apparatus
Publication Date: 2025.09.30 HUAWEI TECH CO LTD
  • US12430242B2 patent drawing
  • US12430242B2 patent drawing
  • US12430242B2 patent drawing

AI summary

Embodiments of the present disclosure disclose a flash memory access method and apparatus, and relate to the field of chips, so as to alleviate a problem in the conventional technology that a conflict occurs when a plurality of software subsystems running on one chip access a flash memory. An example solution is: The method is applied to a system on chip including an access controller and a plurality of processor cores, where the plurality of processor cores are separately connected to the access controller through a bus, a plurality of software subsystems run on the plurality of processor cores, different software subsystems run on different processor cores, and a power supply of the access controller is different from power supplies of the plurality of processor cores, or the access controller shares a power supply with a first processor core that runs a first software subsystem.