Flash Memory Adaptive Program Verification Scheme
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Solution Overview
Problem
Flash memory devices face inefficiencies in programming due to the time-consuming nature of verification operations, especially when dealing with multi-level cell configurations, where the number of program states increases, leading to prolonged programming times and increased verification operation burdens.
Innovation Solution
The implementation of an adaptive program verification scheme that adjusts verification start points based on the margin between threshold voltage distributions and the detection of initial pass bits, allowing for the omission of verification operations before reaching verification start points and predicting verification end points to optimize programming speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If verification operations are performed for all program states in multi-level cell flash memory, then programming reliability is improved, but programming time increases significantly
Solution Approach 1:
The patent performs preliminary detection of pass bits during programming to identify which memory cells have successfully reached target threshold voltages. This preliminary action enables the system to skip verification operations for cells that have already passed, thereby reducing overall verification time while maintaining reliability through targeted verification only where needed.
Solution Approach 2:
The patent applies different verification strategies to different memory cells based on their individual programming status. By detecting pass bits and determining verification start points and end points for each cell, the system performs verification locally only for cells that require it, rather than uniformly verifying all cells. This local quality approach optimizes the balance between reliability and time efficiency.
2Quantity of substance
If the number of program states is increased to store more data per cell, then storage capacity is improved, but verification operation complexity increases
Solution Approach 1:
The patent dynamically adjusts verification parameters including verification start points, end points, and voltage levels based on the specific programming state and detected pass bit status. This dynamic adaptation allows the verification operation to flexibly handle different numbers of program states and memory cell conditions, managing complexity through adaptability rather than fixed rigid procedures.
Solution Approach 2:
The patent implements feedback mechanisms where the detection of pass bits and the determination of verification start/end points are based on real-time programming status information. This feedback loop allows the verification operation to adapt to the actual state of memory cells, reducing complexity by using intelligent control rather than exhaustive fixed-step verification for all possible states.
3Productivity
If verification start points are reduced to skip early verification, then programming speed is improved, but verification accuracy may be compromised
Solution Approach 1:
The patent enables memory cells to essentially verify themselves through the pass bit detection mechanism. By having cells indicate their own programming status through pass bits, the system can trust the self-reporting data to determine verification requirements, thereby safely skipping unnecessary verification steps without compromising accuracy. The cells serve their own verification needs, allowing aggressive optimization.
Data Source
AI summary
A method of programming a flash memory device comprises programming selected memory cells, performing a verification operation to determine whether the selected memory cells have reached a target program state, and determining a start point of the verification operation based on a programming characteristic associated with a detection of a pass bit during programming of an initial program state.