Flash Memory Block Switch Circuit for Multi-Block Erase
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Solution Overview
Problem
Conventional NAND flash memory devices require individual block addressing for erase operations, leading to increased erase time as the number of blocks designated for erasure increases, due to unwanted voltage coupling effects across unselected cell blocks.
Innovation Solution
A flash memory device with a block switch circuit that generates a block select signal in response to decoded block addresses and a control signal, allowing for simultaneous or sequential erasure of multiple memory blocks by applying an erase bias to their wells, thereby reducing erase time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If individual block addressing is used for erase operations, then voltage coupling effects are avoided, but erase time increases significantly
Solution Approach 1:
The invention divides the block selection control into segments by introducing intermediate block selection signals (first block select signal and second block select signal) that are generated based on decoded block address signals. This segmentation allows precise control over which blocks receive erase voltage, enabling multi-block erasure while preventing unwanted coupling effects in unselected blocks.
Solution Approach 2:
The invention applies preliminary action by pre-generating block select signals based on decoded block addresses before the actual erase operation. The block selection circuit prepares the appropriate select signals in advance, allowing the erase voltage to be applied simultaneously to multiple selected blocks without causing coupling effects, thus reducing overall erase time while maintaining reliability.
2Loss of time
If multiple blocks are erased simultaneously, then erase time is reduced, but voltage coupling effects cause unintended erasure in unselected blocks
Solution Approach 1:
The invention implements local quality by making the block selection state unique for each block through the combination of first and second block select signals. Each block has a specific select signal pattern that determines whether it receives the erase voltage. This local differentiation allows simultaneous erasure of multiple blocks while preventing voltage coupling from affecting unselected blocks, as each block's select signal state is locally controlled and distinct.
3Reliability
If block select signals are generated for each block individually, then precise block selection is achieved, but device complexity increases
Solution Approach 1:
The invention achieves universality by using a single block selection circuit that generates multiple block select signals (first and second select signals) for controlling different blocks. The same circuit structure and signal generation mechanism are used regardless of which blocks are selected, allowing the system to handle various block selection combinations without requiring separate control circuits for each block, thus reducing overall device complexity while maintaining selection precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient erasure of multiple memory blocks at once, significantly shortening erase time by controlling the block switch circuit to apply the erase bias only to selected blocks, thus overcoming the limitations of conventional methods.
Implementation Method 1
a word line voltage of an unselected cell block rises due to the coupling effect incurred by capacitance of the word lines and capacitance between the word lines and the P well
Data Source
AI summary
A flash memory device includes a plurality of memory blocks and a plurality of block selection circuits corresponding to the plurality of memory blocks. All of the block selection circuits are sequentially operated in response to block control signals, or two or more of the block selection circuits are operated in response to the block control signals.