Flash Memory Controller Clock Frequency Testing and EMI Distribution
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Solution Overview
Problem
Large-sized flash memory devices often result in poor yields, necessitating a reduction in maximum supported clock frequency to ensure reliability, which limits their performance.
Innovation Solution
A data storage device with a flash memory controller that tests flash memory with various frequencies to determine suitable clock signals, allowing operation beyond the maximum supported frequency, and switches between different clock candidates to distribute electromagnetic interference across multiple bands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the maximum support clock frequency is reduced to ensure reliability of poor flash memory, then reliability is improved, but performance deteriorates
Solution Approach 1:
The patent applies parameter changes by testing the flash memory at multiple clock frequency parameters to identify the optimal operating frequency. Instead of using a fixed reduced frequency for all poor-yield devices, the system dynamically determines and adjusts the clock frequency parameter based on individual memory device characteristics, thereby maintaining reliability while maximizing performance.
Solution Approach 2:
The patent implements dynamics by making the clock frequency adjustable and adaptive rather than fixed. The controller tests different frequency levels and dynamically selects the appropriate operating frequency based on pass/fail criteria, allowing the system to adapt to variations in memory device quality and maintain optimal performance while ensuring reliability.
2Object-affected harmful factors
If multiple clock candidates are used to spread electromagnetic interference, then electromagnetic interference distribution is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the electromagnetic interference issue into multiple frequency bands. Instead of operating at a single clock frequency, the system uses multiple clock candidates at different frequencies, effectively segmenting the interference spectrum and distributing electromagnetic emissions across multiple bands to reduce peak interference levels.
Solution Approach 2:
The patent implements periodic action by switching between multiple clock candidates in a structured manner. The controller periodically tests different clock frequencies and selects appropriate candidates for operation, creating a rhythmic pattern of frequency switching that systematically distributes electromagnetic interference over time and frequency domains.
Data Source
AI summary
An overclocking process for a data storage device using a flash memory. A controller for the flash memory tests the flash memory using test clocks with various frequencies to determine at least one clock signal suitable to the flash memory. The clock candidates suitable to the flash memory are selected from the test clocks. The flash memory is operated in a variable-frequency manner by which the flash memory is switched between the clock candidates, such that electromagnetic interference is spread over different bands.