Flash Memory Accurate Coarse Write for Data Recovery
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing multiple-pass write techniques for Flash memory are inefficient in reducing bus usage and overhead memory, and they do not effectively allow for data recovery in case of power loss between coarse and fine writes.
Innovation Solution
Implementing an accurate coarse write process that deliberately sets a correct voltage level in Flash memory, allowing for data recovery and reducing the need for additional storage, by adjusting configuration settings such as level placement, program pulses, and ramp windows to ensure accurate data interpretation during both coarse and fine writes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple-pass write is used to mitigate interference, then write reliability is improved, but bus usage and overhead memory increase
Solution Approach 1:
The patent performs an accurate coarse write as a preliminary action before the fine write. By deliberately setting the voltage level correctly during the coarse write phase, the system prepares the Flash memory in a state that enables successful completion of the fine write and allows data recovery if power is lost, thereby reducing the need for additional overhead memory and bus transactions.
Solution Approach 2:
The patent changes voltage parameters during the write process. Specifically, it applies different voltage levels during coarse write versus fine write operations, and adjusts configuration settings such as level placement, program pulses, and ramp windows to ensure accurate data interpretation. This parameter manipulation enables reliable writes with reduced overhead.
2Reliability
If traditional multiple-pass write is used, then interference is mitigated, but data recovery capability during power interruption is insufficient
Solution Approach 1:
The accurate coarse write serves as a preliminary protective action that deliberately sets the correct voltage level before the fine write begins. This preliminary step ensures that if power is interrupted during the fine write, the data can still be recovered from the accurately programmed coarse write state, eliminating the need for complex rollback or recovery mechanisms.
Solution Approach 2:
The patent implements beforehand cushioning by performing an accurate coarse write that creates a safe intermediate state. This cushioning protects against power loss during the fine write phase, as the coarse write has already established correct data representation that can be recovered if the process is interrupted.
3Quantity of substance
If accurate coarse write with configuration adjustments is implemented, then overhead storage is reduced, but write process complexity increases
Solution Approach 1:
The patent reduces overhead storage by dynamically changing configuration parameters during the write process. It adjusts level placement, program pulse characteristics, and ramp window settings between coarse and fine writes, allowing the system to use the Flash memory more efficiently without requiring additional overhead storage regions.
Solution Approach 2:
The accurate coarse write process serves multiple functions simultaneously: it mitigates interference, enables data recovery, and reduces overhead storage requirements. By making the coarse write accurate, the system eliminates the need for separate verification or recovery storage regions, as the coarse write itself becomes a reliable data source.
Data Source
AI summary
An instruction to write to a location in the Flash memory is received. It is determining if the Flash memory exposes a level placement setting associated with defining what voltage range corresponds to what level. In the event it is determined that the Flash memory exposes a level placement setting, an accurate coarse write is performed on the location, including by configuring the level placement setting to be a first value, and after the accurate coarse write is performed on the location, a fine write is performed on the location, including by configuring the level placement setting to be a second value, in response to receiving the instruction.