Flash Memory Control Logic for Multi-Plane Program Disturbance
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Solution Overview
Problem
Conventional NAND-type flash memory devices experience program disturbance during multi-plane programming, leading to read errors due to unnecessary stress on program-passed planes when program-failed planes are identified, as program and pass voltages are applied to all planes, causing threshold voltage increases and inaccurate data retrieval.
Innovation Solution
A flash memory device with control logic that differentiates between program-passed and program-failed planes, preventing the application of program and pass voltages to program-passed planes, thereby reducing stress and maintaining accurate threshold voltages, ensuring reliable data storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If program and pass voltages are applied to all planes during multi-plane programming, then program-failed planes can be identified and re-programmed, but program disturbance occurs in program-passed planes causing threshold voltage increases and read errors
Solution Approach 1:
The patent divides the plane set into two distinct segments: program-passed planes and program-failed planes. This segmentation allows differential voltage application where only program-failed planes receive program and pass voltages during re-programming operations, while program-passed planes are excluded from voltage application. This resolves the technical contradiction by maintaining verification reliability through selective re-programming of failed planes without causing program disturbance to already-passed planes.
Solution Approach 2:
The patent applies different voltage treatment to different planes based on their program verification status. Program-passed planes receive no voltage application during re-programming, while program-failed planes receive the full program and pass voltages. This local differentiation eliminates the harmful program disturbance effect on passed planes while maintaining the necessary programming function on failed planes, thereby resolving the contradiction between verification reliability and program disturbance prevention.
2Manufacturing precision
If program operations are repeated until all planes pass, then complete programming coverage is achieved, but unnecessary stress is applied to program-passed planes multiple times
Solution Approach 1:
By segmenting planes into passed and failed categories, the patent enables selective re-programming where only failed planes undergo repeated programming cycles. Passed planes are excluded from subsequent voltage applications, thereby achieving complete programming coverage for failed planes without subjecting passed planes to unnecessary repeated stress.
Solution Approach 2:
The patent applies the partial action principle by limiting voltage application only to the subset of planes that require it (program-failed planes) rather than applying excessive voltage stress to all planes including those that have already passed. This ensures programming completeness for failed planes while avoiding unnecessary stress on passed planes.
Data Source
AI summary
A nonvolatile memory device that includes first and second storage areas, and a control logic configured to control the first and second storage areas, wherein when a program operation of the first storage area is passed before a program operation of the second storage area is passed, the control logic completes the program operation of the first storage area and continues the program operation of the second storage area is provided.