Flash Memory Multi-Page Copyback Address Increment

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Solution Overview

Problem

Conventional non-volatile memory devices face inefficiencies in page copy operations, requiring external storage and potentially leading to data errors due to the use of inverted copies, which are time-consuming and prone to errors during read operations.

Innovation Solution

A multi-page copyback program is implemented in non-volatile memory devices, where a page of data is replaced and its address is incremented until it matches a stored address of a failed page, allowing for efficient and accurate data replacement and error prevention through a control unit and address generator.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional page copy operations are performed using external storage, then data can be copied between pages, but the operation becomes time-consuming and may introduce data errors due to inverted copies

Engineering Contradiction:
Improvedata accuracyVSAvoidcopy operation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The invention extracts the copy operation from external storage and performs it directly within the memory device's internal page buffer, eliminating the need to read data to external storage and then write it back, thus reducing copy time and avoiding inversion errors

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The page buffer serves as an intermediary structure within the memory device that temporarily holds data during copy operations, enabling direct copying between pages without involving external storage, thereby improving both speed and reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multi-page copyback program is implemented with automatic address incrementing, then data replacement efficiency improves, but device complexity increases due to control unit and address generator

Engineering Contradiction:
Improvedata replacement efficiencyVSAvoidcontrol unit structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The control unit is designed to perform multiple functions including initiating copyback programs, generating and incrementing addresses, comparing addresses, and controlling the replacement process, thereby improving productivity without proportionally increasing device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The address generator automatically increments addresses and the control unit autonomously manages the copyback process without requiring external intervention for each page replacement, enhancing efficiency while keeping the control logic integrated

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS7684241B2Flash memory devices having multi-page copyback functionality and related block replacement methods
Publication Date: 2010.03.23 SAMSUNG ELECTRONICS CO LTD
  • US7684241B2 patent drawing
  • US7684241B2 patent drawing
  • US7684241B2 patent drawing

AI summary

Methods of executing a multi-page copyback program in a non-volatile memory device are provided, where the non-volatile memory device includes a memory having a plurality of memory blocks. A page of data of the memory block having a first address is replaced responsive to a generated multi-page copyback program command. It is determined if the first address of the page of data is the same as a stored address of the page at which the failure was detected. The first address is incremented if it is determined that the first address and the stored address are not the same. The pages of data are replaced, the addressed are compared and the addresses are incremented until it is determined that the incremented address and the stored address are the same. Related devices and systems are also provided herein.