Memory Adressing/Allocation/Relocation TRIZ Cases
- Transactional Memory 24-BIT Lookup for Network Processor Throughput
A transactional memory executes a direct 24-bit lookup operation to accelerate hash table searches within network processors.
- Memory Leak Detection via Weak Reference Segmentation
Segmenting strong and weak references identifies unreachable object cycles, preventing garbage collection failures.
- Distributed Storage Snapshot Coordination via Quiesce
Storage manager coordinates snapshot creation across distributed nodes using quiesce instructions to pause compute writes.
- Dirty Cacheline Duplication for Cache Reliability
Duplicating dirty cachelines enables recovery from uncorrectable errors without increasing ECC complexity or die area overhead.
- Memory Extensible Chip Substrate Network Bandwidth
A memory extensible chip uses a substrate network to connect multiple memory module sets for high bandwidth access.
- HCA Queue Descriptor Cache Management via Threshold-Based Prefetching
A host channel adapter cache control module stores queue descriptors and calculates utilization values to manage memory access.
- Memory Access Control Circuitry for Multi-Rank Latency
Segmented tracking circuitry monitors rank states to issue activate commands at optimal frequencies, reducing latency and power consumption.
- Embedded Memory Device Mask ROM E-Fuse Data Revision
An embedded memory device combines mask ROM with e-fuse memory cells and multiplexers to selectively output replacement data.