Flash Memory Counter Implementation for Wear Reduction
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Solution Overview
Problem
The implementation of counters in flash memory devices poses a challenge due to the limited number of write cycles, which can lead to reduced memory lifetime and increased wear, especially in systems requiring high numbers of write cycles like the Trusted Platform Module (TPM), where traditional methods result in inefficient memory usage and high costs.
Innovation Solution
A method is introduced to implement a counter in memory by initializing portions of memory to specific states, where writing a '1' does not cause wear on the cells, and using two portions to store binary values, allowing for efficient counting while minimizing write cycles, thereby extending the memory's lifetime and reducing operational costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional counter implementation methods are used in flash memory, then the counter can store high numbers (e.g., 32,000,000 for TPM), but the memory requires prodigious numbers of write cycles (over 10,000,000 cycles per location) which limits the effective lifetime of the memory
Solution Approach 1:
The patent divides the counter into two separate portions: a first portion storing the least significant bits and a second portion storing the most significant bits. This segmentation allows each portion to be updated independently, reducing the total number of write cycles required. When the first portion overflows, only the second portion needs to be updated, rather than rewriting the entire counter value.
Solution Approach 2:
The patent initializes the first portion of the counter to an erased state (all 1s) before use. This preliminary action exploits the flash memory characteristic where writing a 1 to an already-erased location does not consume a write cycle, allowing the counter to start counting without immediately incurring wear on the memory cells.
2Measurement precision
If traditional counter implementation methods are used in flash memory, then the counter can reach required values (e.g., 32,000,000), but the memory usage becomes impractical and expensive requiring as many as 3,000 memory locations
Solution Approach 1:
By segmenting the counter into two portions with different update frequencies, the patent reduces the total memory locations needed. The first portion can be compact since it wraps around frequently, while the second portion stores only the overflow count, significantly reducing the overall memory footprint compared to traditional implementations.
Solution Approach 2:
The patent applies partial action by only updating the second portion of the counter when the first portion overflows, rather than updating all counter locations on every increment. This partial update strategy reduces both the number of memory locations required and the write cycles consumed.
3Reliability
If robust flash memory with increased write-cycle lifetimes is used to overcome counter implementation issues, then the counter can operate with high write cycles, but the memory becomes inordinately expensive
Solution Approach 1:
The patent changes the operational parameters of the flash memory by exploiting the asymmetric wear characteristics of flash cells. By organizing the counter so that write operations primarily affect only one portion (the first portion) while the second portion is updated much less frequently, the effective write-cycle lifetime is extended without requiring more robust (and expensive) memory hardware.
Data Source
AI summary
A method for implementing a counter in memory, e.g., non-volatile memory such as flash memory. A first number of first binary values indicating a first portion of a current number of the counter in a binary field may be stored in a portion of memory. Storing the first number may also include increasing the number of first binary values in the binary field. Additionally, a second number indicating a second portion of the current number of the counter may be stored in another portion of memory. The second number may specify the number of times the first binary values has comprised the entirety of the binary field. Thus, the first number and second number may specify the current number of the counter. Storing the first and second number may be performed a plurality of times to implement a counting function of the counter.