Flash Memory Dummy Word Line for Program Disturb

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Solution Overview

Problem

In NAND flash memory systems, unintended programming of unselected cells, known as 'program disturb,' occurs due to the application of program voltage to all cells connected to a word line, leading to inefficiencies and potential errors in data storage.

Innovation Solution

The introduction of a dummy word line between the source side select element and the first word line, allowing a program voltage to be applied only to the selected non-volatile storage element while an intermediate voltage is applied to the dummy word line, effectively isolating and reducing the risk of unintended programming.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If program voltage is applied to all cells connected to a word line for programming, then programming operation can be performed, but unintended programming of unselected cells occurs causing program disturb

Engineering Contradiction:
Improveprogramming operationVSAvoidprogram disturb
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the word line structure by introducing a dummy word line between the source side select element and the first word line. This segmentation allows independent voltage control of different cell groups, enabling selective programming while preventing program disturb in unselected cells through isolated voltage application.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dummy word line acts as an intermediary element that mediates between the source side select element and the first word line. By applying intermediate voltage to this intermediary structure, the patent controls the potential distribution to prevent harmful GIDL effects in unselected cells while maintaining programming capability in selected cells.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If program voltage is applied to selected non-volatile storage element, then accurate programming can be achieved, but Gate Induced Drain Leakage occurs in unselected cells

Engineering Contradiction:
Improveprogramming accuracyVSAvoidGate Induced Drain Leakage
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent applies different voltage levels to different spatial regions: high program voltage to the selected cell's word line for accurate programming, and intermediate voltage to the dummy word line region to suppress GIDL. This local differentiation of voltage quality eliminates harmful leakage while maintaining programming precision.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The dummy word line structure provides preliminary protection against GIDL by establishing an intermediate voltage potential before the harmful leakage can occur in unselected cells. This preventive measure counteracts the harmful electric field effects before they can cause damage.

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces Gate Induced Drain Leakage (GIDL) and minimizes program disturb, enhancing the accuracy and efficiency of programming operations by isolating the channel of unselected cells, thereby improving data storage reliability.

Implementation Method 1

This solution reduces Gate Induced Drain Leakage (GIDL) and minimizes program disturb, enhancing the accuracy and efficiency of programming operations by isolating the channel of unselected cells

Methodology Applied
Scientific EffectGate Induced Drain Leakage (GIDL): Electrical Resistance

Data Source

PatentUS7440322B2Method and system for flash memory devices
Publication Date: 2008.10.21 SANDISK TECHNOLOGIES LLC
  • US7440322B2 patent drawing
  • US7440322B2 patent drawing
  • US7440322B2 patent drawing

AI summary

Method and system for memory devices is provided. The system includes a plurality of non-volatile storage elements connected in a string between a source side element and a drain side element; a plurality of bit lines, wherein each bit line is connected to a plurality of non-volatile storage elements; and a plurality of word lines, the plurality of word lines include a dummy word line between a source side select element and a first word line that is connected to a first non-volatile storage element to be programmed, wherein a program voltage is applied to the first non-volatile storage element connected to the first word line and an intermediate voltage is applied to a second non-volatile storage element connected to the dummy word line.