Flash Memory Erase Count Management via Dummy Cell Storage

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Solution Overview

Problem

Nonvolatile memory devices, particularly flash memory devices, face challenges in efficiently managing erase counts to prevent uneven wear and potential defects across memory blocks, which affects their reliability and longevity.

Innovation Solution

A nonvolatile memory device and method that includes a memory block with main and dummy memory cells, where the erase count is stored and managed in dummy memory cells, allowing for efficient tracking and distribution of erase operations across the memory block, thereby preventing uneven wear.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If erase count is managed using working memory only, then management flexibility is improved, but data loss risk increases when power is interrupted

Engineering Contradiction:

Improveerase count management flexibilityVSAvoiderase count data retention

Core Design Contradiction:

Ease of operationVSReliability

Solution Approach 1:

The patent creates a backup copy of the erase count data. The erase count is simultaneously stored in both the working memory (for flexible management) and the dummy memory cells within the nonvolatile memory device (for reliable retention). This copying approach allows the system to maintain operational flexibility while protecting against data loss during power interruptions.

Inventive Principle:

Principle #26Copying

2Reliability

If dummy memory cells are used to store erase count, then data retention reliability is improved, but memory resource utilization decreases

Engineering Contradiction:

Improveerase count data retentionVSAvoidmemory resource utilization

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The patent employs dummy memory cells that are already present in the memory device structure for storing erase count information. These dummy cells, which would otherwise be unused or idle resources, are repurposed to store metadata (erase count), thereby serving dual purposes: maintaining the memory device's operational characteristics while providing reliable erase count retention without requiring additional dedicated storage resources.

Inventive Principle:

Principle #25Self-service

3Duration of action of stationary object

If wear leveling is implemented to distribute erase cycles evenly, then memory device lifespan is extended, but system complexity increases

Engineering Contradiction:

Improvememory device lifespanVSAvoidwear leveling management complexity

Core Design Contradiction:

Duration of action of stationary objectVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism where the erase count stored in dummy memory cells is continuously monitored and used to guide wear leveling operations. The controller reads the erase count from dummy cells, compares wear levels across different memory blocks, and dynamically adjusts data distribution patterns to balance wear. This feedback loop enables automated wear leveling management that extends device lifespan while keeping system complexity manageable through intelligent control algorithms.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS9058900B2System, semiconductor memory device and operating method thereof

Publication Date: 2015.06.16 SK HYNIX INC

AI summary

A method for operating a semiconductor memory device including a memory block constituted by first memory cells used as main memory cells and second memory cells includes reading out an erase count of the memory block stored in the second memory cells, erasing the memory block, increasing the read-out erase count, and storing the increased erase count in the second memory cells.