Flash Memory Wear Leveling Using Sector Error Flags
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Solution Overview
Problem
Conventional wear leveling methods in flash memory require complex circuit designs and do not account for the actual deterioration status of memory cells, leading to potential data errors, especially in critical sectors like those storing boot data.
Innovation Solution
A flash memory system that includes a memory cell array with sectors having flags indicating bit correction and data presence, migrating data to new sectors when errors occur or updates are needed, ensuring equal sector usage and minimizing errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional wear leveling methods use counters to equalize the number of accesses to blocks or sectors, then the number of rewrite times can be equalized, but the circuit design becomes complex
Solution Approach 1:
The patent extracts the wear leveling function from the controller and implements it directly in the flash memory device itself. The flash memory includes wear leveling tables stored in its memory that map logical addresses to physical addresses, enabling the device to perform wear leveling autonomously without requiring complex external circuitry or host system intervention.
Solution Approach 2:
The patent introduces wear leveling tables as an intermediary data structure between the host system and the physical memory blocks. These tables act as a mapping layer that translates logical addresses to optimal physical addresses, allowing the system to equalize wear across blocks without direct host system monitoring or complex control circuits.
2Reliability
If wear leveling equalizes the number of accesses based on counters, then access distribution is improved, but the actual deterioration status of memory cells is not known
Solution Approach 1:
The patent implements feedback mechanisms where the flash memory device monitors the state of memory blocks and dynamically adjusts the wear leveling table mappings. The device detects block deterioration through read disturbances and programming failures, then uses this feedback information to redirect future writes to less worn blocks, ensuring both equal access distribution and awareness of actual cell deterioration status.
3Ease of operation
If boot data is stored in sectors with few accesses, then read operations are simplified, but data errors may occur due to undetected cell deterioration
Solution Approach 1:
The patent performs preliminary actions by proactively selecting and designating specific blocks or sectors to store boot data before any deterioration occurs. The wear leveling controller pre-identifies blocks with optimal characteristics (low wear, good health status) and reserves them for critical boot data storage, ensuring that boot data is always placed in the most reliable locations before the system needs to read them.
Data Source
AI summary
A flash memory that improves the reliability of data stored in a memory cell array is provided in the disclosure. A wear leveling method of the flash memory of the disclosure includes the following operation. The memory cell array includes multiple sectors, the method includes the following operation. A region is set for storing a first flag and a second flag in each sector of multiple sectors of the memory cell array. The first flag indicates whether bit correction has occurred, and the second flag indicates whether specific data is stored. The second flag of a source sector among the sectors in which the specific data is stored is set. The specific data is written to a new sector among the sectors in which the first flag is in a reset state, and the second flag of the new sector is set.