Flash Memory Inhibit Voltage Control for RC Coupling
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Solution Overview
Problem
The programming of flash memory devices is hindered by RC coupling, leading to slow charging of bit lines and subsequent delays in system performance due to the RC factor, which slows down the charging of inhibited bit lines and affects the overall programming speed.
Innovation Solution
The implementation of an inhibit control circuit that regulates the inhibit voltage below the supply voltage, using a reference voltage circuit and operational amplifier to control the charging of bit lines, allowing them to reach an inhibit voltage quickly, thereby reducing the time required for bit lines to return to 0V and enabling faster programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bit lines are charged to VCC inhibit voltage, then programming inhibition is achieved, but charging time increases due to RC coupling
Solution Approach 1:
The patent changes the inhibit voltage parameter from the conventional VCC level to a lower voltage level (e.g., VCC/2 or other reduced levels). This parameter change reduces the charging time constant effect of RC coupling while still achieving effective programming inhibition, thus resolving the contradiction between reliable inhibition and fast charging.
2Ease of operation
If uninhibited bit lines are capacitively coupled to inhibited bit lines, then voltage coupling occurs, but programming speed decreases due to delayed voltage return to 0V
Solution Approach 1:
By reducing the inhibit voltage parameter, the patent decreases the capacitive coupling effect between inhibited and uninhibited bit lines. This allows uninhibited bit lines to return to 0V faster, thereby increasing programming speed while maintaining adequate voltage coupling for inhibition functionality.
3Reliability
If RC coupling is present in bit lines, then electrical connection is established, but programming performance is hindered by slow charging
Solution Approach 1:
The patent addresses the RC coupling limitation by changing the voltage parameter from VCC to a reduced level. This parameter modification reduces the time constant impact of RC coupling, maintaining reliable electrical connection while significantly improving programming performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution significantly reduces the time needed for bit line charging, allowing for faster programming of flash memory devices and enhancing system performance by minimizing the impact of RC coupling on programming speed.
Implementation Method 1
Programming flash memory can be a time consuming process due, in part, to an RC coupling of the bit lines
Implementation Method 2
uninhibited bit lines adjacent to the inhibited bit lines are capacitively coupled to the inhibited bit lines
Data Source
AI summary
Methods for programming a memory array and memory devices are disclosed. In one such method, inhibited bit lines are charged to an inhibit voltage that is less than a supply voltage. The word lines of memory cells to be programmed are biased at a programming preparation voltage that is less than a nominal programming preparation voltage as used in the conventional art. Programming pulses can be applied to selected word lines of the memory cells to be programmed when the uninhibited bit lines are at 0V.