Flash Memory LBA to PBA Mapping via Pre-built FAT

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Solution Overview

Problem

In storage devices using NAND flash memory, the conversion of logical block addresses to physical block addresses is inefficient, particularly for non-sequential data access, leading to reduced system speed due to the time-consuming construction of management information.

Innovation Solution

A control device and storage control method that includes a management information generation unit to create or update logical-physical block address management information, which is written to the non-volatile memory along with data, allowing for efficient conversion and access, reducing the need for garbage collection and enhancing write and read speeds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If management information is constructed by sequentially scanning physical blocks for non-sequential LBA access, then accurate mapping can be achieved, but system speed is reduced due to time-consuming construction

Engineering Contradiction:
Improveaddress conversion accuracyVSAvoidsystem access speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent applies preliminary action by pre-constructing and storing management information (FAT structure) in the flash memory during initial system setup or idle periods. This pre-built mapping structure allows for rapid LBA to PBA conversion during actual data access operations, eliminating the need for time-consuming sequential scanning at the moment of access and thus resolving the contradiction between accuracy and speed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by creating a virtual copy of the physical block address mapping information in the form of a File Allocation Table (FAT) structure stored in the flash memory. This copied management information allows the system to perform fast lookups without physically scanning the entire memory space, achieving both accurate address conversion and high access speed.

Inventive Principle:
Principle #26Copying

2Reliability

If management information is constructed for non-sequential data access, then proper mapping can be established, but the construction process takes excessive time

Engineering Contradiction:
Improvedata mapping correctnessVSAvoidmanagement information construction time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs the time-consuming management information construction as a preliminary action during system initialization or when the flash memory is idle, rather than during active data access operations. The FAT structure is pre-built and stored, so that when actual data access occurs, the mapping information is already ready, thus resolving the contradiction between reliability and time loss.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses self-service by automatically maintaining and updating the management information structure during normal write operations. When data is written to the flash memory, the system simultaneously updates the FAT structure to reflect the new mappings, eliminating the need for separate time-consuming construction processes and ensuring continuous accuracy without additional time penalty.

Inventive Principle:
Principle #25Self-service

3Ease of operation

If sequential LBA access is used, then simple management is possible, but non-sequential access performance deteriorates

Engineering Contradiction:
Improveaddress management simplicityVSAvoidnon-sequential access speed
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent creates a copied management structure (FAT table) that mirrors the physical block address mappings. This copied structure allows the system to handle non-sequential LBA access efficiently by performing fast lookups in the FAT table rather than scanning physical blocks sequentially, thus maintaining ease of operation while dramatically improving non-sequential access productivity.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The FAT structure serves as an intermediary between the logical block addresses and physical block addresses. This intermediary layer allows the system to translate non-sequential LBA requests into efficient physical access patterns without requiring complex real-time calculations or sequential scanning, thus resolving the contradiction between operational simplicity and access speed for non-sequential data.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10025706B2Control device, storage device, and storage control method
Publication Date: 2018.07.17 ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC
  • US10025706B2 patent drawing
  • US10025706B2 patent drawing
  • US10025706B2 patent drawing

AI summary

A control device includes: a management information generation unit configured to generate or update logical-physical block address management information with respect to either data to be written to a non-volatile memory or data which has been already written in the non-volatile memory, the logical-physical block address management information indicating association between a logical block address and a physical block address on the non-volatile memory; and an access control unit configured to, during write of the data to the non-volatile memory, control write of the data as well as the logical-physical block address management information to a physical write unit of the non-volatile memory.