Flash Memory Over-Erasure Correction via Leakage Detection

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Solution Overview

Problem

Flash memory devices experience issues with over-erasure correction, leading to current leakage and false data readings due to incomplete correction before power-on, causing power dissipation loss and operational failures.

Innovation Solution

A method for detecting current leakage in memory blocks after power-up and performing over-erasure correction on affected columns or blocks to restore threshold voltages, ensuring accurate data reading and reducing power dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If power is shut down before over-erasure correction is completed, then power consumption is reduced, but over-erased cells remain uncorrected causing current leakage and false data reading

Engineering Contradiction:
Improvepower consumptionVSAvoiddata reading accuracy
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent performs over-erasure correction during the power-up sequence before the memory device enters normal operation. By detecting over-erased cells and correcting their threshold voltages during initialization, the system ensures data integrity is established before the device begins regular read/write operations, preventing current leakage issues without requiring additional power consumption during operation.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If over-erasure correction is performed on all memory blocks, then all over-erased cells are corrected, but power dissipation increases and bit line power supply is overloaded

Engineering Contradiction:
Improvecorrection completenessVSAvoidpower dissipation
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent implements a selective correction approach where only memory blocks containing over-erased cells are subjected to over-erasure correction. The system first performs a read operation to detect which specific blocks have over-erased cells, then applies correction pulses only to those identified blocks. This localized correction strategy maintains data integrity while significantly reducing power dissipation compared to correcting all blocks uniformly.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies correction pulses with controlled magnitude and duration - using just enough correction to fix over-erased cells without applying excessive correction to all cells. The correction process stops once over-erased cells are corrected, avoiding unnecessary power consumption from redundant correction operations on already-proper cells.

Inventive Principle:
Principle #16Partial or excessive action

3Loss of energy

If over-erasure correction is performed quickly after power-on, then power dissipation loss is reduced, but correction precision may be compromised

Engineering Contradiction:
Improvepower dissipation lossVSAvoidthreshold voltage correction precision
Core Design Contradiction:
Loss of energyVSManufacturing precision

Solution Approach 1:

The patent performs detection and correction during the power-up sequence before normal operation begins. This preliminary correction ensures that threshold voltages are properly adjusted while the memory device is still initializing, capturing the window where correction can be done quickly without impacting operational performance or requiring extended correction times that would increase power dissipation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11087853B2Power-on over-erasure correction method and memory device utilizing same
Publication Date: 2021.08.10 ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
  • US11087853B2 patent drawing
  • US11087853B2 patent drawing
  • US11087853B2 patent drawing

AI summary

A memory device includes a plurality of memory blocks and each memory block includes a plurality of columns of memory cells. Each column of memory cells is coupled to a corresponding bit line. Upon completion of a power-up sequence, detect if a current leakage of corresponding columns in a group of memory blocks is greater than a predetermined level. If the current leakage of the corresponding columns in the group of memory blocks is greater than the predetermined level, perform an over-erasure correction on the corresponding columns.