Flash Memory Page Buffer Precharge Circuit for Parasitic Capacitance

Solution Overview

Problem

As integration density of semiconductor memory devices increases, parasitic capacitances between sense nodes in flash memory devices lead to capacitive coupling, causing read errors due to voltage fluctuations, especially in high-density designs where sense nodes are affected by adjacent nodes, resulting in incorrect detection of memory cell states.

Innovation Solution

The flash memory device employs a page buffer circuit with a precharge circuit and a sense and latch circuit that precharges and develops both the bitline and sense node, ensuring the sense node's voltage is maintained and compensated during the read operation, minimizing the impact of parasitic capacitances and preventing read errors by recharging the sense node before latching the result.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If integration density of flash memory devices is increased, then storage capacity is improved, but parasitic capacitances between sense nodes increase causing read errors

Engineering Contradiction:

Improvestorage capacityVSAvoidread operation reliability

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The sense node is precharged to a predetermined voltage level before the read operation begins. This preliminary charging action ensures that the sense node starts at a known, stable voltage state, preventing voltage fluctuations during the read operation that could be caused by parasitic capacitances from adjacent sense nodes.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

A dedicated precharge circuit is introduced as an intermediary component between the power supply and the sense node. This precharge circuit specifically charges only the sense node to the required voltage level, isolating it from the influence of adjacent sense nodes and their parasitic capacitances during the read operation.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Area of stationary object

If sense nodes are placed closer together to increase integration density, then device compactness is improved, but capacitive coupling between adjacent sense nodes causes voltage fluctuations and read errors

Engineering Contradiction:

Improvedevice areaVSAvoidparasitic capacitance effect

Core Design Contradiction:

Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

By precharging the sense node to a predetermined voltage before the read operation, the system establishes a stable initial state that is independent of the proximity of adjacent sense nodes. This preliminary action prevents the harmful capacitive coupling effects from influencing the read operation, allowing sense nodes to be placed closer together without sacrificing read reliability.

Inventive Principle:

Principle #10Preliminary action

3Speed

If read operation is performed without precharging sense node, then operation speed is improved, but voltage stability deteriorates due to parasitic capacitance effects

Engineering Contradiction:

Improveread operation speedVSAvoidsense node voltage stability

Core Design Contradiction:

SpeedVSStability of the object's composition

Solution Approach 1:

The sense node is precharged to a predetermined voltage level before the read operation begins. This preliminary charging action ensures that the sense node starts at a known, stable voltage state, preventing voltage fluctuations during the read operation that could be caused by parasitic capacitances from adjacent sense nodes.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

A dedicated precharge circuit is introduced as an intermediary component between the power supply and the sense node. This precharge circuit specifically charges only the sense node to the required voltage level, isolating it from the influence of adjacent sense nodes and their parasitic capacitances during the read operation.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach stabilizes the read operation by reducing the effect of parasitic capacitances, ensuring accurate detection of memory cell states and reducing the likelihood of read errors, thereby enhancing the reliability of data retrieval in high-density flash memory devices.

Implementation Method 1

Before the read operation, a bitline and a sense node are precharged. The precharge circuit precharges a bitline and a sense node

Methodology Applied

Scientific EffectCapacitance: Capacitance

Implementation Method 2

The sense node is developed while the bitline is developed. After the bitline is developed, a voltage level of the sense node is latched

Methodology Applied

Scientific EffectVoltage development:

Implementation Method 3

a voltage level of the sense node is latched as a read result. However, several problems arise at a read operation because there are parasitic capacitances CC0-CC2 between page buffers and sense nodes

Methodology Applied

Scientific EffectVoltage compensation:

Data Source

PatentUS7679966B2Flash memory device and read method thereof

Publication Date: 2010.03.16 SAMSUNG ELECTRONICS CO LTD

AI summary

A flash memory device and a read method thereof are provided. At a read operation, a sense node of a page buffer is developed while a bitline is developed and data of a selected memory cell is sensed based on the develop result of the sense node. For a develop period, voltage loss arising from the sense node is compensated fast and the compensated result is latched, which makes it possible to simplify the design and reduce a chip size.