Multi-Chip Flash Memory Parallel Status Data Reading
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Solution Overview
Problem
In multi-chip flash memory devices, frequent requests for ready/busy signals from multiple memory chips lead to prolonged standby times, hindering fast interleaved programming operations and degrading the operation rate of the memory system.
Innovation Solution
A method where a single command is used to request and receive ready/busy status data from all memory chips simultaneously through different channels, allowing the status signals to be output in parallel via specifically assigned input/output pins, reducing the need for individual requests and outputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If ready/busy signals are requested from each memory chip individually in time-divisional mode, then each chip can be monitored, but the standby time is prolonged and operation rate is degraded
Solution Approach 1:
The patent merges the status monitoring of multiple memory chips into a single parallel operation. Instead of sequentially requesting ready/busy signals from each chip (time-divisional mode), the invention enables simultaneous monitoring of all chips by assigning each chip a dedicated I/O pin for status output, allowing the host to receive status data from all chips in parallel, thus dramatically reducing standby time and improving operation rate
2Reliability
If frequent requests for ready/busy signals are made to check programming operations, then operation states can be monitored, but time consumption increases
Solution Approach 1:
The patent enables continuous and simultaneous monitoring of all memory chips without interruption. By assigning dedicated I/O pins to each chip for status signal output, the host can continuously receive ready/busy signals from all chips in parallel, eliminating the sequential waiting time inherent in time-divisional monitoring, thus maintaining reliable operation state monitoring while minimizing time loss
3Ease of operation
If time-divisional mode is used for command provision and signal output, then chip identification is simplified, but the speed of confirming ready/busy status is reduced
Solution Approach 1:
The patent segments the I/O pins to create dedicated status output channels for each memory chip. Each chip is assigned a specific I/O pin for ready/busy signal output, allowing simultaneous independent monitoring of all chips. This segmentation enables parallel status confirmation while maintaining simple command management through the memory controller's ability to address each chip individually
Data Source
AI summary
A method for reading status data from a multi-chip memory device including pluralities of memory chips is comprised of: providing a command to request an output of the status data to the plurality of memory chips; and accepting the status data of the plurality of memory chips through multiple channels of the multi-chip memory device. The reading method of the status data is helpful to shortening a standby time for accepting the status data of the multi-chip memory device, enhancing an operation rate.