Flash Memory Pass Voltage Control for Read Disturbance
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Solution Overview
Problem
Current flash memory technologies experience read disturbance issues due to frequent bit value changes from 1 to 0, affecting reliability, especially when a memory page is read numerous times.
Innovation Solution
A flash memory system with a pass voltage generator that gradually raises the pass voltage from a first to a second voltage, lower than a target voltage times a preset ratio, before the bit line voltage starts, to reduce perturbation and minimize read disturbance during reading operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the pass voltage is rapidly raised to the target voltage during a reading operation, then the reading speed is improved, but read disturbance occurs due to voltage perturbation on the bit line
Solution Approach 1:
The pass voltage is raised to a first voltage (lower than the target voltage) before the bit line voltage starts rising, and then raised to the target voltage after the bit line voltage stabilizes. This preliminary action prevents voltage perturbation on the bit line during the critical reading phase, thereby reducing read disturbance while maintaining reading speed.
Solution Approach 2:
The voltage raising process is divided into two stages: first raising the pass voltage to a first voltage (target voltage × preset ratio) before the bit line voltage starts, then raising it to the target voltage after the bit line voltage stabilizes. This segmentation of the voltage ramping process eliminates the harmful voltage perturbation that would occur if the full target voltage were applied simultaneously with the bit line voltage.
2Reliability
If the pass voltage is raised before the bit line voltage starts, then read disturbance is reduced, but the voltage rising time is extended
Solution Approach 1:
The pass voltage generator dynamically adjusts the voltage raising timing based on the bit line voltage status. The system raises the pass voltage to a first voltage before the bit line voltage starts, then raises it to the target voltage after the bit line voltage stabilizes. This dynamic timing adjustment reduces read disturbance while minimizing the total voltage rising time.
3Object-affected harmful factors
If the pass voltage is raised to a lower voltage (target voltage × preset ratio) at the start time point of bit line voltage, then bit line perturbation is reduced, but the voltage level is compromised
Solution Approach 1:
The pass voltage is raised to a first voltage (target voltage × preset ratio) at the start time point of the bit line voltage, which is sufficient to prevent bit line perturbation during the critical reading phase. The voltage is then raised to the full target voltage after the bit line voltage stabilizes, ensuring both reduced perturbation and adequate voltage level for successful reading.
Data Source
AI summary
A flash memory and an operation method thereof are provided. The flash memory includes a plurality of memory cell strings and a pass voltage generator. Each of the memory cell strings includes a plurality of memory cells. The pass voltage generator is configured to provide a pass voltage to a plurality of word lines of a plurality of unselected memory cells of a selected memory string. During a reading operation, the pass voltage generator raises the pass voltage from a first voltage at a first time point, and raises the pass voltage to a second voltage at a second time point. The second voltage is lower than a target voltage times a preset ratio The first time point is earlier than a start time point of a bit line voltage received by the selected memory cell, and the second time point occurs at the start time point of the bit line voltage.