Flash Memory Pass Voltage Control for Programming Reliability
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Solution Overview
Problem
Flash memory devices face challenges in ensuring a sufficient pass voltage window, which is crucial for reliable programming operations, as existing methods require multiple iterations and delay development due to the narrow pass voltage window determined post-fabrication.
Innovation Solution
A flash memory device with a voltage controller that adjusts pass voltage levels during programming operations, dividing word-line addresses into zones with distinct pass voltages applied to selected and unselected areas, allowing incremental or constant voltage shifts to optimize the pass voltage window.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed pass voltage is applied to unselected word lines during programming, then the programming operation can be performed, but the pass voltage window is narrow and requires multiple iterations to determine the optimal voltage level, delaying development
Solution Approach 1:
The patent applies dynamics by making the pass voltage adjustable and variable during the programming operation. The voltage controller dynamically changes the pass voltage level applied to unselected word lines based on the programming stage, allowing the system to adapt to different programming conditions and optimize the pass voltage window without requiring multiple fabrication iterations.
Solution Approach 2:
The patent implements parameter changes by varying the pass voltage level as a controllable parameter during programming. The voltage controller modifies the pass voltage parameter according to different programming stages and requirements, enabling optimization of the pass voltage window through parameter adjustment rather than through multiple fabrication iterations.
2Reliability
If a high pass voltage is applied to unselected word lines, then the pass voltage disturbance is reduced, but program voltage disturbance occurs causing malfunction to program-inhibited memory cells
Solution Approach 1:
The patent applies local quality by differentiating the voltage treatment between selected and unselected word lines. The voltage controller selectively applies different voltage levels to different regions (selected vs. unselected word lines) based on the programming operation requirements, ensuring that unselected lines receive sufficient pass voltage without causing program voltage disturbance to inhibited memory cells.
Solution Approach 2:
The patent uses dynamics by making the pass voltage applied to unselected word lines variable and controllable. The voltage controller dynamically adjusts the pass voltage level during programming operations, allowing optimization of pass voltage stability while preventing program voltage disturbance through real-time voltage modulation.
3Reliability
If a low pass voltage is applied to unselected word lines, then program voltage disturbance is minimized, but pass voltage disturbance occurs causing malfunction to memory cells on unselected word lines
Solution Approach 1:
The patent implements local quality by providing differentiated voltage control for selected and unselected word lines. The voltage controller ensures that unselected word lines receive an optimized pass voltage level that is sufficient to prevent pass voltage disturbance to memory cells on those lines, while maintaining program voltage stability through selective voltage application.
Solution Approach 2:
The patent applies parameter changes by making the pass voltage level adjustable and controllable during programming operations. The voltage controller modifies the pass voltage parameter applied to unselected word lines to optimize both program voltage stability and prevent pass voltage disturbance, eliminating the need to choose between the two conflicting requirements.
Data Source
AI summary
The flash memory device includes a memory cell array having a plurality of memory cells, a high voltage generator configured to generate a plurality of pass voltages, with a first pass voltage of the plurality of pass voltages supplied to the memory cell array during a programming operation; and a main controller including a voltage controller configured to shift the first pass voltage at a plurality of time intervals during the programming operation.