Flash Memory Plane Switching for Threshold Stability
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Solution Overview
Problem
In NAND-type flash memory, the miniaturization of components leads to gate-induced drain leakage (GIDL) and writing errors due to increased capacitive load, causing instability in memory cell threshold voltage distribution and reducing operational speed.
Innovation Solution
The flash memory operates by selecting at least one plane and electrically connecting the bit line of unselected planes to a reference voltage, providing a common gate select signal to both selected and unselected planes, which prevents unexpected current flow and maintains stable threshold voltage distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of blocks in the memory cell array is increased to increase memory capacity, then the memory capacity is improved, but the load capacitance of the global bit line increases and operation speed becomes slower
Solution Approach 1:
The memory cell array is divided into multiple planes, with each plane containing a subset of blocks. This segmentation allows the global bit line to serve smaller groups of blocks simultaneously, reducing the load capacitance per operation while maintaining overall memory capacity. The controller can selectively activate specific planes based on access patterns, further optimizing speed.
2Area of moving object
If the distance between the select transistor and memory cell is reduced for miniaturization, then device density is improved, but gate-induced drain leakage increases causing writing errors
Solution Approach 1:
A dummy cell is introduced as an intermediary element between the bit-line-side select transistor and the actual memory cells. This dummy cell acts as a buffer that absorbs the harmful capacitive coupling and GIDL effects, preventing electrons from being incorrectly injected into the floating gate of adjacent memory cells during write operations, thereby maintaining writing accuracy despite miniaturization.
3Device complexity
If a common gate select signal is provided to both selected and unselected planes, then device complexity is reduced, but unexpected current flow occurs in unselected planes causing threshold voltage instability
Solution Approach 1:
Before applying the common gate select signal to both selected and unselected planes, the bit line of the unselected plane is pre-connected to a reference voltage through a switch unit. This preliminary action establishes a stable voltage reference that prevents unexpected current flow when the gate select signal is applied, thereby maintaining threshold voltage stability in unselected planes while allowing simplified common signal distribution.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of memory cell threshold voltage distribution, reducing writing errors and maintaining operational speed by preventing capacitive coupling-induced voltage changes in unselected planes.
Implementation Method 1
maintaining operational speed by preventing capacitive coupling-induced voltage changes in unselected planes
Implementation Method 2
the drain of the bit-line-side/source-line-side select transistor and the memory cell is getting smaller. This can easily cause the drain of the bit-line-side/source-line-side select transistor to generate gate-induced drain leakage (GIDL)
Data Source
AI summary
A flash memory of the invention has a plurality of planes, a controller, a switch unit, and a driving control circuit. The controller is configured to select at least one of the planes. The switch unit is configured to electrically connect bit lines of the unselected plane to a reference voltage. The driving control circuit is configured to commonly provide a gate select signal to select transistors of the selected planes and the unselected planes after the bit lines of the unselected plane is electrically connected to the reference voltage. A flash memory that can reliably seek stability of threshold distribution of memory is provided.