Flash Memory Program Verify Voltage Control
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Solution Overview
Problem
In flash memory devices, particularly multiple level memory cells, the widening of threshold voltage distributions can lead to errors in reading programmed states due to the limited voltage range, necessitating a method to tighten these distributions.
Innovation Solution
Implementing a multi-level verification method that adjusts bit line voltages based on the location of the threshold voltage within defined verify levels, allowing for precise control of programming speed and preventing further programming once a target state is reached, thereby maintaining margins between states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple level memory cells are programmed to store multiple bits, then storage density is improved, but threshold voltage distributions widen causing reading errors
Solution Approach 1:
The programming process is segmented into multiple verification levels (first verify level, second verify level, third verify level) with distinct voltage ranges. Each level corresponds to a specific bit position being programmed, allowing independent control and verification of threshold voltage distributions for different stored bits, thereby preventing overlap and reading errors while maintaining high storage density
Solution Approach 2:
Different verification voltage levels are applied depending on the bit position and programming stage. The controller dynamically adjusts verification voltages (e.g., first verification voltage for LSB, second verification voltage for middle bits, third verification voltage for MSB) to optimize threshold voltage separation and maintain clear margins between states throughout the programming process
2Device complexity
If verification pulses are applied at fixed voltage levels, then the programming process is simple, but threshold voltage distributions cannot be tightly controlled
Solution Approach 1:
The verification process transitions from fixed voltage levels to dynamic voltage adjustment. The controller selectively applies different verification voltages based on the current programming stage and bit position being programmed. This dynamic approach allows tight control of threshold voltage distributions while managing complexity through automated control logic
3Speed
If programming pulses increase charge level significantly, then programming speed is improved, but threshold voltage distributions enlarge causing state overlap
Solution Approach 1:
The programming process incorporates multiple verification steps with feedback to the controller. After each programming pulse, verification pulses are applied to measure the current threshold voltage distribution. Based on the verification results, the controller adjusts subsequent programming pulse parameters to achieve the target state without excessive charge accumulation, preventing state overlap while maintaining efficient programming speed
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively tightens the threshold voltage distributions, reducing errors in reading programmed states and ensuring accurate data storage by optimizing bit line biasing during programming pulses.
Implementation Method 1
Each programming pulse increases a charge level on charge trapping material (e.g., a floating gate) of the target memory cell, thereby increasing the cell's threshold voltage Vt
Implementation Method 2
Operation of memory cells in electronic devices includes applying electrical signals to their terminals so as to modify the threshold voltage of the memory transistors
Data Source
AI summary
A method for program verify is disclosed, such as one in which a threshold voltage of a memory cell that has been biased with a programming voltage can be determined and its relationship with multiple program verify voltage ranges can be determined. The program verify voltage range in which the threshold voltage is located determines the subsequent bit line voltage. The subsequent bit line voltage may be less than a previous bit line voltage used to program the memory cell.