Flash Memory Sequential Programming Reduces Peak Current
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memory devices face challenges with high programming current consumption, leading to power noise and limitations in the number of chips that can be tested simultaneously, due to inefficiencies in the power supply and bit line leakage current, especially during overerase conditions.
Innovation Solution
A method of sequential programming where memory cells are divided into subgroups and programmed in a staggered manner, using an enable control signal to manage the programming process, reducing the peak current demand on the power supply and distributing the programming operation over time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If all memory cells in a word unit are programmed simultaneously, then programming speed is improved, but power supply current demand increases excessively
Solution Approach 1:
The patent divides the word unit into multiple subgroups (e.g., first subgroup and second subgroup) and programs them sequentially rather than simultaneously. This segmentation reduces the peak current demand on the power supply while still achieving complete programming of all cells in the word unit.
Solution Approach 2:
The patent employs periodic programming cycles where different subgroups are activated in sequence. The control circuit enables the first subgroup for a first period, then enables the second subgroup for a second period, creating a time-based periodic action that distributes power consumption over multiple cycles.
2Power
If high current is supplied to the power supply, then programming operation is maintained, but power noise increases
Solution Approach 1:
By segmenting the programming operation into sequential subgroup activations, the patent reduces peak current draw from the power supply. This lower, more distributed current demand minimizes voltage drops and power noise while maintaining adequate programming power delivery.
3Power
If high current flows through connection lines, then programming is enabled, but voltage drop due to resistance increases causing power noise
Solution Approach 1:
The patent segments the programming current demand across multiple time periods by activating subgroups sequentially. This reduces the instantaneous current through connection lines, thereby minimizing voltage drops due to line resistance and improving voltage stability during programming operations.
4Productivity
If the power supply current limit is exceeded, then programming can proceed quickly, but the number of chips that can be tested simultaneously is limited
Solution Approach 1:
By segmenting programming into sequential subgroup operations, the patent reduces peak current demand per chip. This allows multiple chips to be tested simultaneously within the power supply's current limits, increasing overall testing capacity while maintaining programming throughput through parallel testing of multiple chips.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the demand on the power supply, minimizes power noise, and decreases the susceptibility to bit line leakage current, allowing for more efficient programming and increased testing capacity without exceeding the power supply current limits.
Implementation Method 1
This bias from-drain to-source generates hot electrons near the drain side. The large gate-to-source voltage pulses enable a probability of hot electrons to overcome an energy barrier between the channel and floating gate formed by a thin dielectric layer, thereby driving hot electrons onto the floating gate of the cell.
Data Source
AI summary
A method of programming a group of memory cells in a semiconductor memory device selecting a group of memory cells for programming, and enabling a first subgroup of memory cells from the group of memory cells for programming. After enabling the first subgroup, the programming method waits a first predetermined time period and after the first predetermined time period, enables a second subgroup of memory cells from the group of memory cells for programming while continuing to enable the first subgroup for programming.