Flash Memory Read Level Calibration for Endurance
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Solution Overview
Problem
Multi-level cell (MLC) flash memory devices used in SSDs face reliability and endurance issues due to wear-causing stresses during read, program, and erase operations, leading to gradual degradation, especially in enterprise applications where high data capacity is needed but at increased costs.
Innovation Solution
A method is introduced to adjust the read level voltage using offset voltages to identify a zero crossing point in reliability values, calibrating the voltage to optimize read operations and reduce errors across memory cells, thereby improving the endurance and reliability of MLC flash memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If MLC flash memory is used to increase data capacity, then storage capacity is improved, but reliability and endurance deteriorate due to wear-causing stresses
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the read level voltage based on the number of program/erase cycles. As the memory device ages and undergoes more P/E cycles, the read level voltage is recalibrated to compensate for threshold voltage shifts and cell degradation, thereby maintaining reliable data retrieval despite the inherent reliability issues of MLC flash memory
2Quantity of substance
If MLC flash memory is used to increase data capacity, then storage capacity is improved, but endurance deteriorates due to gradual degradation from read, program and erase operations
Solution Approach 1:
The patent implements preliminary action by performing read level calibration at predetermined intervals during the memory device's lifecycle. By proactively adjusting the read level voltage before significant degradation occurs, the system prevents error accumulation and extends the operational endurance of the MLC flash memory
Solution Approach 2:
The patent uses feedback mechanisms by monitoring the number of program/erase cycles and using this information to dynamically adjust the read level voltage. This closed-loop approach allows the system to adapt to aging effects and maintain optimal read performance throughout the memory device's lifespan
3Reliability
If read level voltage is adjusted using offset voltages to calibrate voltage, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies self-service by implementing an automated read level calibration process that the memory controller performs independently. The system automatically adjusts the read level voltage based on monitored P/E cycle counts without requiring external intervention or complex manual calibration procedures, thereby improving reliability while keeping the control mechanism relatively simple
Data Source
AI summary
After a predetermined period of time in a life cycle of a flash memory device, a plurality of reliability values corresponding to a plurality of reads of one or more of the plurality of memory cells are generated; each of the reads using a variation of a predetermined read level voltage. An offset voltage is then identified, offset from the read level voltage. The offset voltage corresponds to a zero crossing point in the range of the reliability values. Once the offset voltage is identified, the read level voltage is set to a calibrated voltage based on the offset voltage.