Flash Memory Selective Bitline Precharging for Power Reduction
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Solution Overview
Problem
Flash memory devices experience increased power consumption due to the need to precharge all bit lines when uncorrectable read errors occur, leading to wear and reduced efficiency in data retrieval.
Innovation Solution
A method and system that selectively precharge only the bit lines connected to target sectors with uncorrectable errors, while inhibiting precharge of bit lines connected to pass sectors with correctable errors, and perform read retry operations until errors are corrected, reducing power consumption and extending device lifespan.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all bit lines are precharged when uncorrectable read errors occur, then data retrieval reliability is improved, but power consumption increases
Solution Approach 1:
The patent segments the bit lines into two groups: those connected to target sectors (with uncorrectable errors) and those connected to pass sectors (with correctable errors). Only the bit lines connected to target sectors are precharged during read retry operations, while bit lines connected to pass sectors are not precharged. This segmentation resolves the contradiction by maintaining data retrieval reliability for affected sectors while reducing overall power consumption by excluding unaffected sectors from the precharge operation.
2Reliability
If all bit lines are precharged during read retry operations, then error correction capability is improved, but device lifespan is reduced due to increased wear
Solution Approach 1:
The patent applies segmentation by identifying and isolating only the bit lines connected to target sectors that require error correction through read retry operations. By precharging only these specific bit lines rather than all bit lines, the frequency and intensity of write/erase operations are reduced, thereby decreasing wear on the flash memory device and extending its operational lifespan while maintaining error correction capability for the affected sectors.
3Use of energy by moving object
If selective precharge is implemented only for target sectors, then power consumption is reduced, but operational complexity increases
Solution Approach 1:
The patent employs preliminary action by performing error correction decoding on all sectors before the read retry operation. This preliminary decoding identifies which sectors have uncorrectable errors (target sectors) and which have correctable errors (pass sectors). Based on this pre-established information, the system selectively precharges only the bit lines connected to target sectors during the read retry operation. This preliminary classification simplifies the overall operation by avoiding the need for complex real-time decisions during the read retry process.
Data Source
AI summary
A method of operating a memory system including a non-volatile memory device and a memory controller controlling the non-volatile memory device, includes reading data from a memory cell array in a unit of a page which includes a plurality of sectors; performing error correction decoding on the read data in a unit of a sector of the page; selecting at least one target sector which includes at least one uncorrectable error and selecting at least one pass sector wherein all errors of the pass sector are correctable by the error correction decoding; inhibiting precharging of bit-lines connected to the at least one pass sector while precharging target bit lines connected to the at least one target sector; and performing a read retry operation for data in the at least one target sector.