Flash Memory Selective Row Erase to Reduce Cell Overstressing

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Solution Overview

Problem

Flash memory devices face issues with overstressing of memory cells during erase operations, leading to increased failure rates due to unnecessary additional erase pulses applied to already erased cells, which can cause them to go into depletion mode and affect neighboring cells.

Innovation Solution

A method is introduced that performs an erase operation on a block of memory, followed by an erase verify read to identify unerased cells, and then conducts a selective erase operation only on the rows with unerased cells, reducing unnecessary stress on already erased cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional erase pulses are applied to the entire column when one unerased cell is detected, then the unerased cell is erased, but already erased cells are overstressed and their failure rate increases

Engineering Contradiction:
Improvememory cell failure rateVSAvoiderase operation efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the erase operation by dividing the memory block into individual rows and applying erase pulses selectively to only those rows containing unerased cells, rather than applying erase pulses to the entire column. This segmentation allows targeted erasure of problematic cells while protecting already erased cells from additional stress.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local quality by identifying specific rows with unerased cells and applying erase operations only to those localized regions. The selective erase operation modifies the electrical characteristics (applying high voltage) only to the specific word lines corresponding to rows containing unerased cells, leaving other rows unaffected.

Inventive Principle:
Principle #3Local quality

2Reliability

If pre-programming is performed before erase operation, then cells are less likely to go into depletion mode, but the overall erase process time increases

Engineering Contradiction:
Improvedepletion mode preventionVSAvoiderase process duration
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-programming the memory block before the erase operation. This sets all cells to a known programmed state, ensuring they start from a consistent condition that prevents them from entering depletion mode during erasure. The pre-programming establishes a baseline state that makes the subsequent erase operation more controlled and reliable.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP1894206B1Memory block erasing in a flash memory device
Publication Date: 2010.08.18 MICRON TECHNOLOGY INC
  • EP1894206B1 patent drawingFigure 1
  • EP1894206B1 patent drawingFigure 2~3
  • EP1894206B1 patent drawingFigure 4

AI summary

The erase and verify method performs an erase operation and an erase verify read operation. If the erase verify read operation fails because unerased memory cells have been found, a normal memory read operation is performed in order to determine which memory cells are still programmed. A selective erase operation is then performed on the memory cells such that only the rows that comprise unerased memory cells undergo additional erase operations.