Flash Memory Set-Up Data Initialization for Unstable Power
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Solution Overview
Problem
The reliability of semiconductor memory devices, particularly NAND flash memory, is compromised during system initialization due to data read errors caused by unstable power voltages and defective memory cells, leading to reduced yield and functionality.
Innovation Solution
A flash memory device and initialization method that utilize a set-up data region with first and second data, where the second data is stored in an empty cell area and decoded using a spread data programming technique to generate a Pass/Fail status signal, ensuring reliable data reading even under unstable power conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If system initialization is performed before internal power voltage reaches optimal level, then initialization speed is improved, but data read errors increase due to unstable power conditions
Solution Approach 1:
The patent applies preliminary action by performing initialization operations before the power voltage reaches its optimal level. The set-up data is read and processed in advance during the power-up interval, allowing the system to be ready for normal operation sooner. This resolves the contradiction by accepting the risk of unstable power conditions during initialization in exchange for faster overall system startup.
Solution Approach 2:
The patent implements beforehand cushioning by using set-up data stored in a dedicated set-up data region that is specifically designed to be read during the power-up interval. This pre-prepared data structure acts as a cushion that allows safe initialization even when power voltage is unstable, protecting the system from potential errors that would occur with normal data reading during this critical period.
2Loss of time
If set-up data is read during power-up interval before voltage stabilization, then system startup time is reduced, but data errors occur due to voltage fluctuations
Solution Approach 1:
The patent applies segmentation by dividing the memory space into a dedicated set-up data region and a normal data region. The set-up data region contains specifically prepared initialization data that is intended to be read during the power-up interval. This segmentation allows the system to separate critical initialization data from other data, enabling safe reading during unstable power conditions without risking corruption of normal data.
Solution Approach 2:
The patent uses set-up data as an intermediary element that facilitates safe initialization during power-up. This intermediary data structure acts as a buffer between the unstable power conditions and the critical initialization processes, allowing the system to perform necessary setup operations while protecting against voltage-induced errors through the use of specially designed error detection and correction mechanisms.
3Quantity of substance
If NAND flash memory is highly integrated to increase storage capacity, then data storage density is improved, but functional yield decreases due to increased fabrication complexity
Solution Approach 1:
The patent applies preliminary action by performing defect detection and repair operations during the manufacturing testing phase, storing the results in the set-up data region. This allows defective memory cells to be identified and compensated for before the device is shipped to customers. By performing these repairs in advance during fabrication, the patent ensures that the highly integrated NAND flash memory maintains high functional yield despite the increased complexity and smaller feature sizes associated with high-density integration.
Data Source
AI summary
A flash memory device includes a memory cell array having a set-up data region configured to store set-up data, wherein the set-up data includes first data and second data. The second data is stored in an empty cell area of the set-up data region. The flash memory also includes a page buffer and decoder configured to read the set-up data from the set-up data region, and a status detector receiving the set-up data from the page buffer and decoder and configured to discriminate the first data from the second data and generate a Pass/Fail status signal.