Flash Memory Programming Circuit Voltage Detection
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Solution Overview
Problem
Existing semiconductor memory devices face inefficiencies in programming operations, particularly due to inadequate bit line voltage, leading to increased programming time and potential over-programming, especially in high VCC environments, where prior methods result in wasted time and potential cell degradation.
Innovation Solution
A programming method and circuit that includes a voltage detector to assess whether the bit line voltage meets a target voltage, allowing for controlled programming of memory cells as a group or subgroups based on the detection, optimizing the programming operation by ensuring adequate voltage is provided.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If programming operation is performed on a group of memory cells without voltage detection, then programming speed is maintained at conventional levels, but programming time is increased and cell degradation occurs due to inadequate bit line voltage
Solution Approach 1:
The voltage detector performs preliminary detection of bit line voltage before the programming operation begins. This preliminary action identifies voltage deficiencies in advance, allowing the system to divide the memory cell group into subgroups or adjust programming parameters beforehand, preventing cell degradation while optimizing programming time.
Solution Approach 2:
The voltage detector provides real-time feedback on bit line voltage levels during the programming process. Based on this feedback, the control circuit dynamically adjusts the programming strategy by dividing cells into subgroups or modifying programming parameters, thereby reducing programming time and preventing over-programming of cells.
2Reliability
If bit line voltage is increased to ensure adequate programming voltage, then programming reliability is improved, but power consumption increases and cell degradation occurs
Solution Approach 1:
Instead of applying excessive voltage to the entire memory cell group, the system uses the voltage detector to identify only the cells or subgroups that require additional voltage. The control circuit then applies voltage selectively to these specific cells, avoiding unnecessary power consumption in cells that already have adequate voltage.
Solution Approach 2:
The voltage detector and control circuit enable local adjustment of voltage distribution across different memory cell groups. Cells with inadequate voltage receive enhanced voltage, while cells with adequate voltage receive normal programming voltage, creating a non-uniform but optimized voltage distribution that reduces overall power consumption while maintaining programming reliability.
3Productivity
If programming operation is divided into subgroups based on voltage detection, then programming time is reduced, but device complexity increases due to voltage detection and control circuitry
Solution Approach 1:
The memory cell group is segmented into multiple subgroups based on voltage detection results. The voltage detector divides cells into those with adequate voltage and those with inadequate voltage, allowing the control circuit to process them separately. This segmentation enables parallel programming operations that reduce total programming time while keeping each subgroup's control circuitry relatively simple.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces programming time by up to 50% compared to prior methods, ensuring efficient programming even in high VCC environments and minimizing cell degradation by optimizing voltage usage.
Implementation Method 1
a voltage detector to assess whether the bit line voltage meets a target voltage
Implementation Method 2
The large gate-to-source voltage pulses enable a probability of hot electrons to overcome an energy barrier between the channel and floating gate formed by a thin dielectric layer, thereby driving hot electrons onto the floating gate of the cell
Data Source
AI summary
A program method for a flash memory semiconductor device includes the steps of providing a bit line voltage for programming a group of memory cells and detecting if the bit line voltage meets a selected target voltage. When the bit line voltage meets the selected target voltage, a program operation is performed on the group of memory cells. When the bit line voltage does not meet the selected target voltage, the programming operation is individually performed on at least a first subgroup of memory cells from the group and a second subgroup of memory cells from the group.


