Multi-bit Flash Memory Pointer Addressing

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Solution Overview

Problem

Flash memory devices face challenges in addressing ambiguity between block and page addresses when storing 3-bit data, requiring an address conversion table to distinguish between them, which is not necessary when using a pointer to select pages.

Innovation Solution

A multi-bit flash memory device and controller system that uses a pointer to select pages instead of addresses, allowing for efficient read/program operations without the need for an address conversion table, by transmitting commands, pointers, and addresses in specific orders to differentiate between block and page addresses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an address conversion table is used to distinguish between block and page addresses when storing 3-bit data, then addressing ambiguity is resolved, but device complexity increases

Engineering Contradiction:
Improveaddressing accuracyVSAvoidaddress conversion table
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The address space is segmented into distinct block addresses and page addresses with different bit lengths. Block addresses use 10 bits to address 1024 blocks, while page addresses use 7 bits to address 128 pages within each block. This segmentation eliminates the need for address conversion tables by providing unique address formats for different address types.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a hierarchical addressing dimension where the 10-bit block address and 7-bit page address operate at different levels of the address hierarchy. The block address selects the coarse-grained memory block, while the page address selects the fine-grained page within that block, creating a two-dimensional address space that resolves ambiguity without requiring conversion tables.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of operation

If traditional address-based page selection is used, then page addressing is straightforward, but address ambiguity occurs when storing 3-bit data

Engineering Contradiction:
Improvepage selectionVSAvoidaddress differentiation
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The address selection process is segmented into two independent stages: first selecting the block using a 10-bit block address, then selecting the page within that block using a 7-bit page address. This segmentation allows each address type to have its own unique format and length, eliminating ambiguity in page selection while maintaining operational simplicity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The block address acts as an intermediary between the external controller and the page address. The 10-bit block address first identifies the memory block, which then serves as the context for the subsequent 7-bit page address. This intermediary block address level resolves the ambiguity that would otherwise exist in direct page addressing schemes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8127073B2Memory system, multi-bit flash memory device, and associated methods
Publication Date: 2012.02.28 SAMSUNG ELECTRONICS CO LTD
  • US8127073B2 patent drawing
  • US8127073B2 patent drawing
  • US8127073B2 patent drawing

AI summary

A memory system includes a multi-bit flash memory device and a flash controller configured to control the multi-bit flash memory device. The flash controller is configured to output a series of commands, pointers, and addresses to the multi-bit flash memory device for read/program operations.