Flash Memory Read-Level Offset Using Aggressor Cell Counts
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Solution Overview
Problem
The challenge of distorted threshold voltage distributions in flash memory devices due to word line coupling and varying charge loss in selection memory cells, leading to read errors, is not effectively addressed by existing technologies.
Innovation Solution
A memory device and method that groups adjacent memory cells into aggressor cell groups, counts the number of cells in specific states, and adjusts read operations using an offset level based on cell counts to mitigate threshold voltage distortions and improve data recovery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of word lines stacked vertically is increased to improve integration, then the integration density is improved, but the threshold voltage distortion of memory cells due to word line coupling increases
Solution Approach 1:
The patent segments the memory cells into different groups based on their position relative to the selection word line. Specifically, it identifies first memory cells connected to the selection word line and second memory cells connected to adjacent word lines, treating them as separate aggressor cell groups. This segmentation allows for differentiated threshold voltage compensation strategies for each group, thereby reducing overall threshold voltage distortion while maintaining high vertical integration density.
Solution Approach 2:
The patent applies local quality by determining different offset levels for different memory cell groups. The control logic calculates a first offset level for first memory cells and a second offset level for second memory cells, where the offset levels are determined based on the specific coupling patterns and aggressor cell configurations of each group. This localized compensation approach addresses the varying degrees of threshold voltage distortion in different regions of the memory array.
2Productivity
If the number of string selection lines formed on the top gate layer is increased, then the integration is improved, but the charge loss variation of selection memory cells increases
Solution Approach 1:
The patent introduces dynamic compensation by determining offset levels based on the actual coupling patterns detected during operation. The control logic dynamically calculates offset levels for different memory cell groups based on their specific configurations and coupling conditions. This dynamic adjustment allows the system to compensate for charge loss variations in real-time, maintaining reading accuracy despite the increased number of string selection lines and varying retention conditions.
3Reliability
If a data recovery read operation is performed to reduce threshold voltage distortion, then the reading accuracy is improved, but the read operation complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-grouping memory cells into first and second groups based on their connection to selection and adjacent word lines before the actual read operation. The control logic pre-determines the offset levels for each group based on their coupling patterns. This preliminary classification and compensation parameter determination simplifies the subsequent read operation, as the system only needs to apply the pre-calculated offset levels during reading, rather than performing complex real-time analysis for each cell.
Data Source
AI summary
There is provided a memory device including a memory cell array having a plurality of memory cells connected to a plurality of word lines, and control logic. The control logic groups adjacent memory cells, among the plurality of memory cells, connected to an adjacent word line adjacent to a selection word line, among the plurality of word lines, into a plurality of aggressor cell groups, identifies one or more coupling patterns of selection memory cells connected to the selection word line based on each of the plurality of aggressor cell groups, counts a number of first memory cells in a first area of neighboring first and second states corresponding to a first coupling pattern, among the one or more coupling patterns, and obtains an offset level for a data recovery read operation of the first and second states based on the number of first memory cells.