Flash Memory Soft Read Threshold Layout for MLC Error Correction
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Solution Overview
Problem
Flash memory devices face challenges in accurately reading data due to increased interactions and perturbations between cells, especially with multi-level cell (MLC) storage, leading to higher bit error rates and limited reliability over time, as the threshold voltage distributions change and cells drift, making it difficult to maintain optimal voltage bands for error correction.
Innovation Solution
The implementation of a non-uniform soft bit read scheme, where reference thresholds are distributed across the threshold window to accommodate varying error rates, allowing for optimized placement of read thresholds and independent optimization of read sensing operations, and the use of asymmetric soft read points around hard read points to enhance error correction capabilities without increasing digital circuits in the flash device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level cell (MLC) storage is used to increase storage capacity, then the number of bits stored per cell increases, but the threshold voltage distributions become narrower and more prone to drift, leading to higher bit error rates and limited retention time
Solution Approach 1:
The patent segments the threshold window into multiple voltage bands with non-uniform spacing. By dividing the threshold window into distinct regions (first region with first set of voltage bands, second region with second set of voltage bands) with different densities of read thresholds, the system can independently optimize error correction for different parts of the threshold distribution, thereby managing the reliability challenges of MLC storage while maintaining high storage capacity
Solution Approach 2:
The patent applies local quality by using different densities of read thresholds in different regions of the threshold window. The first region has a first density of read thresholds while the second region has a second density, allowing the system to allocate more read thresholds to regions with higher error susceptibility. This localized optimization enables the system to handle the narrower and more drift-prone threshold voltage distributions characteristic of MLC storage without sacrificing overall storage capacity
2Device complexity
If traditional uniform read thresholds are used, then the read circuit design is simple, but the error correction capability is insufficient in regions with higher error rates
Solution Approach 1:
The patent implements local quality by configuring different densities of read thresholds in different regions of the threshold window. The first region has a first density of read thresholds while the second region has a second density, allowing the system to allocate more read thresholds to regions with higher error susceptibility. This enables enhanced error correction capability in critical regions without uniformly increasing complexity across the entire read circuit
Solution Approach 2:
The patent changes the parameter of read threshold density from uniform to non-uniform. By adjusting the density of read thresholds in different regions (first region vs. second region), the system optimizes error correction capability where needed while maintaining simpler circuit design in less critical regions. This parameter change allows the read circuit to adapt to the non-uniform error distribution in MLC memory without requiring uniformly high complexity throughout
3Reliability
If higher density of read thresholds is used in error-prone regions, then error correction capability is improved, but the read speed and energy consumption increase
Solution Approach 1:
The patent applies local quality by concentrating higher density of read thresholds only in the first region where errors are more likely to occur, while using lower density in the second region. This localized approach improves error correction capability in critical areas without requiring high-density read thresholds across the entire threshold window, thereby minimizing the impact on read speed and energy consumption
Solution Approach 2:
The patent changes the density parameter of read thresholds from uniform to non-uniform distribution. By adjusting the density parameter locally in different regions (higher in first region, lower in second region), the system achieves improved error correction where needed while maintaining faster read speeds in less critical regions. This selective parameter adjustment optimizes the trade-off between reliability and productivity
Data Source
AI summary
A non-volatile memory has its cells' thresholds programmed within any one of a first set of voltage bands partitioned by a first set of reference thresholds across a threshold window. The cells are read at a higher resolution relative to a second set of reference thresholds so as to provide additional soft bits for error correction. The reference thresholds of the second set are set up to be non-uniformly distributed on the threshold window so as to provide higher resolution at designated regions. At the same time they are conducive to be read in groups for soft bits to be read bit-by-bit systematically with a simple algorithm and read circuit and using a minimum of data latches. This is accomplished by relaxing the requirement that the first set of reference threshold is a subset of the second set and that the resulting soft bits are symmetrically distributed about the hard bits.