FlexE FEC Calendar Slot Mapping for BER and Reach Trade-Offs
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Solution Overview
Problem
Current Ethernet interfaces require new specifications every time the Forward Error Correction (FEC) or reach objective changes, leading to increased costs and complexity for vendors and operators, as they need to define new interfaces for different Bit Error Rates (BER) and reach distances, which is inefficient and inflexible.
Innovation Solution
The implementation of Flexible Ethernet (FlexE) enhanced FEC, which maps Ethernet payload clients and FEC data into a Time Division Multiplexing (TDM) structure, allowing for dynamic adjustment of calendar slots to maintain or increase the overall Physical (PHY) rate, thereby supporting various Ethernet rates without the need for new interface specifications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If new interface specifications are defined for different BER and reach distances, then BER performance and reach are improved, but device complexity and specification complexity increase
Solution Approach 1:
The patent applies universality by creating a single FlexE interface specification that can dynamically support multiple BER targets and reach distances through configurable FEC schemes. Instead of defining separate interface specifications for different BER requirements, the system uses a universal interface with adjustable FEC parameters (e.g., RS(255,239), RS(255,223), LDPC codes) that can be selected based on the desired reach and BER performance, thereby reducing specification complexity while maintaining improved BER performance.
Solution Approach 2:
The patent applies dynamics by enabling dynamic selection and configuration of FEC schemes within the FlexE interface. The system can dynamically adjust the FEC parameters and calendar slot allocations based on real-time requirements for BER performance and reach distance, allowing the interface to adapt its error correction capabilities without requiring new specifications or hardware modifications.
2Reliability
If FEC data is added to the FlexE TDM structure, then BER performance is improved, but bandwidth for Ethernet payload clients is reduced
Solution Approach 1:
The patent applies partial action by allocating only the necessary portion of calendar slots to FEC data based on the specific BER requirements and reach distance needed. Rather than dedicating excessive bandwidth to FEC, the system dynamically determines the minimum FEC overhead required (e.g., using stronger FEC only when longer reach is needed) and allocates calendar slots accordingly, thereby minimizing the impact on Ethernet payload bandwidth while achieving the required BER performance.
Solution Approach 2:
The patent applies parameter changes by dynamically adjusting the FEC scheme parameters (code rate, redundancy level, calendar slot allocation) based on the specific application requirements. The system can change parameters such as selecting between different FEC codes (RS, LDPC) and adjusting the number of calendar slots dedicated to FEC data, thereby optimizing the balance between BER performance and available bandwidth for Ethernet payload clients for each specific deployment scenario.
3Adaptability or versatility
If FlexE enhanced FEC is implemented, then adaptability to different Ethernet rates is improved, but implementation complexity increases
Solution Approach 1:
The patent applies universality by designing the FlexE enhanced FEC mechanism to work across multiple Ethernet rates (10G, 25G, 40G, 100G, and future rates) through a unified framework. The same calendar slot mapping and FEC configuration mechanisms can be applied regardless of the specific Ethernet rate, providing adaptability to different rates without requiring rate-specific implementations, thereby managing complexity while maintaining versatility.
Solution Approach 2:
The patent applies segmentation by separating the FEC functionality into distinct calendar slots that are independently configurable. This allows the FEC mechanism to be applied selectively to different rate requirements through modular calendar configurations, where each rate can be supported by appropriate calendar slot allocations without requiring complex integrated designs for each specific rate.
Data Source
AI summary
Flexible Ethernet (FlexE) Forward Error Correction (FEC) systems and methods include mapping a first set of calendar slots including Ethernet payload clients to a FlexE Time Division Multiplexing (TDM) structure including a plurality of calendar slots; and mapping a second set of calendar slots including FEC data to the FlexE TDM structure, wherein the first set of calendar slots and the second set of calendar slots fill the FlexE TDM structure. In an exemplary embodiment, an overall Physical (PHY) rate of the FlexE TDM structure is kept constant with a reduction in bandwidth for the Ethernet payload clients based on the second set. In another exemplary embodiment, the overall Physical (PHY) rate of the FlexE TDM structure is increased based on the second set of calendar slots, to support a set rate for the Ethernet payload clients with a reduced number of calendar slots.