Flexible eFuse Memory for Post-Manufacture IC Trimming

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Solution Overview

Problem

Analog integrated circuits (ICs) face challenges due to device-to-device variations, which require calibration, but existing eFuse memories are area-intensive and limited to storing trimming parameters only during the design phase, making it difficult to accommodate components identified after chip manufacture and variations based on current device conditions.

Innovation Solution

The eFuse memory is organized with both static and flexible allocation of trimming parameters, using an address pointer table, fixed packets, and flexible packets that allow for efficient storage and adaptation of trimming parameters based on current device conditions, enabling calibration of components identified both during and after chip manufacture, and minimizing memory size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If eFuse memory is used to store trimming parameters, then device variation compensation is achieved, but memory area increases significantly

Engineering Contradiction:
Improvedevice variation compensationVSAvoidmemory area
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The eFuse memory is segmented into static allocation portion and flexible allocation portion. The static portion stores trimming parameters for components identified during design phase with fixed packet structures, while the flexible portion accommodates components identified after chip manufacture with variable packet structures. This segmentation allows efficient space utilization for each type of trimming parameter.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The flexible allocation portion implements dynamic packet structures where packet length and content can vary based on the specific trimming parameters needed. The address pointer table dynamically maps to different packet structures, allowing the memory to adapt to different calibration scenarios and minimize wasted space.

Inventive Principle:
Principle #15Dynamics

2Ease of operation

If eFuse memory is organized with fixed packet structures, then addressing is simplified, but memory space utilization decreases

Engineering Contradiction:
Improveaddressing simplicityVSAvoidmemory space utilization
Core Design Contradiction:
Ease of operationVSQuantity of substance

Solution Approach 1:

The memory is divided into fixed allocation packets for design-phase components and flexible allocation packets for post-manufacture components. The address pointer table provides simplified addressing for both types, maintaining ease of operation while allowing efficient space utilization in the flexible portion.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The packet structure parameters (length, content, organization) are changed based on the allocation type. Fixed packets use uniform structures for simple addressing, while flexible packets vary their parameters to match the actual trimming parameter requirements, optimizing space utilization.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If eFuse memory accommodates components identified after chip manufacture, then adaptability improves, but memory organization complexity increases

Engineering Contradiction:
Improvepost-manufacture component calibrationVSAvoidmemory organization
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory is segmented into static and flexible portions, with the address pointer table providing a unified interface for both. This segmentation allows post-manufacture component calibration through the flexible portion while maintaining simple addressing through the pointer table, managing complexity effectively.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The address pointer table acts as an intermediary layer between the simplified addressing interface and the complex flexible packet structures. It translates simple address requests into appropriate packet accesses, shielding the user from the underlying organizational complexity while enabling adaptable post-manufacture calibration.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Manufacturing precision

If trimming parameters are stored for multiple device conditions, then calibration accuracy improves, but memory requirements increase

Engineering Contradiction:
Improvecalibration accuracyVSAvoidmemory requirements
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

Different portions of the flexible allocation memory are optimized for different device conditions. The memory structure allows storing trimming parameters tailored to specific conditions (temperature, Nyquist rate, etc.) only where needed, rather than duplicating full parameter sets for all conditions. This local optimization improves calibration accuracy for each condition while minimizing total memory requirements.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10930362B2Flexible and efficient device trim support using eFuse
Publication Date: 2021.02.23 TEXAS INSTRUMENTS INC
  • US10930362B2 patent drawing
  • US10930362B2 patent drawing
  • US10930362B2 patent drawing

AI summary

A one-time write, read-only memory for storing trimming parameters includes an address pointer table, a fixed packet portion, and a flexible packet portion. The fixed packet portion includes one or more fixed packets, each fixed packet including trimming parameters for a component identified for trimming during a design phase. The flexible packet portion includes one or more flexible packets of different types. Each flexible packet includes trimming parameters for a component identified for trimming after the design phase. One packet type includes a length section and a number of fields equal to a value stored in the length section. Each field includes an address, a trimming parameter, and a mask. Another packet type includes trimming parameters associated with operands in operating instructions for a microcontroller, where the operands include an address and a mask.