Memory Erase Suspend-Resume Control for Over-Erasure Prevention
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Solution Overview
Problem
Existing memory devices face issues with over-erasure during suspend-resume operations, leading to reliability degradation and increased operational latency due to frequent interruptions in erase operations.
Innovation Solution
Implementing flexible erase suspend-resume operations that dynamically split a full erase pulse into multiple segmentations by initiating a timer at flattop, pausing and resuming the erase operation based on commands, and avoiding over-erasure by controlling the total time at flattop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If erase operations are suspended to execute other commands, then operational flexibility and response time improve, but over-erasure occurs leading to reliability degradation
Solution Approach 1:
The patent applies preliminary action by initiating a timer at the flattop of the erase pulse before suspension occurs. This timer tracks the cumulative flattop time, and the system checks whether resuming the erase operation would exceed the maximum allowable flattop duration. This preemptive timing mechanism prevents over-erasure before it can occur, allowing safe suspend-resume operations.
2Adaptability or versatility
If erase operations are frequently interrupted for other commands, then operational versatility improves, but operational latency increases
Solution Approach 1:
The patent applies dynamics by implementing a flexible suspend-resume mechanism that dynamically adjusts erase operation timing. The system can suspend erase operations at appropriate points and resume them later, with the timer mechanism dynamically tracking cumulative flattop time across multiple pulses. This dynamic approach allows the system to handle various command sequences while minimizing unnecessary delays, as the erase operation can be efficiently resumed without requiring complete re-execution.
3Reliability
If the total flattop time is strictly controlled to prevent over-erasure, then memory cell reliability is maintained, but erase operation complexity increases
Solution Approach 1:
The patent applies feedback by implementing a timer that continuously monitors cumulative flattop time and provides feedback to the control logic. Before resuming an erased operation, the system checks the timer value to determine whether the maximum flattop duration would be exceeded. This feedback mechanism enables reliable control of erase timing while keeping the implementation relatively simple, as the timer provides automatic tracking without requiring complex calculations or multiple separate timing circuits.
Data Source
AI summary
Memory systems with flexible erase suspend-resume operations are described herein. In one embodiment, a memory device is configured to receive an erase suspend command while a first erase pulse of an erase operation is at a flattop voltage. In response, the memory device suspends the erase operation. The memory device further resumes the erase operation such that a second erase pulse of the erase operation is ramped to the flattop voltage. Absent intervening erase suspend operations, erase operations of the memory device can include a single erase pulse that remains at the flattop voltage for a total duration. A first total duration plus a second total duration the first and second erase pulses, respectively, remain at the flattop voltage remains less than or equal to the total duration the single erase pulse remains at the flattop voltage.