Flip-Chip LED Electrode Layout for Current Spreading

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Solution Overview

Problem

Existing light-emitting diodes (LEDs) face challenges in optimizing electrode contact regions to enhance current density distribution and reduce forward voltage, which affects their efficiency and performance.

Innovation Solution

A flip-chip light-emitting device design featuring a semiconductor stack with specific electrode configurations, including a first electrode covering insulation layer openings and a second electrode connected to the second semiconductor layer, along with a protective layer that varies in thickness to optimize contact areas and current distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the electrode contact regions are enlarged to reduce forward voltage and improve current distribution, then the light-emitting area is reduced

Engineering Contradiction:
Improvecurrent distribution balanceVSAvoidlight-emitting area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The patent applies local quality by creating different thickness regions of the insulation layer at specific locations. The insulation layer has a first thickness at the first electrode contact region and a second thickness at the second electrode contact region, where the thickness ratio is between 0.5 and 2. This localized thickness variation optimizes current distribution at electrode regions without uniformly reducing the light-emitting area, thus resolving the contradiction between improving current balance and maintaining light emission area.

Inventive Principle:
Principle #3Local quality

2Reliability

If the insulation layer thickness is increased to improve electrode isolation, then the electrical connection efficiency is reduced

Engineering Contradiction:
Improveelectrode isolationVSAvoidelectrical connection efficiency
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements local quality by varying the insulation layer thickness across different regions. At electrode contact regions, the insulation layer has reduced thickness (with a thickness ratio between 0.5 and 2) to enhance electrical connection efficiency, while at other regions it maintains sufficient thickness for proper electrode isolation. This localized thickness optimization resolves the contradiction between isolation and connection efficiency.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The insulation layer is segmented into different thickness zones: a first thickness region at the first electrode contact region, a second thickness region at the second electrode contact region, and intermediate regions connecting them. This segmentation allows the structure to simultaneously achieve good isolation in non-contact areas and efficient electrical connection at contact areas, resolving the contradiction between isolation and connection efficiency.

Inventive Principle:
Principle #1Segmentation

3Area of moving object

If the semiconductor stack structure is optimized for large light-emitting area, then the electrode contact regions become insufficient for efficient current distribution

Engineering Contradiction:
Improvelight-emitting areaVSAvoidcurrent distribution efficiency
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent resolves this contradiction by applying local quality through differentiated insulation layer thickness at electrode contact regions versus other regions. The first thickness at the first electrode contact region and second thickness at the second electrode contact region (with ratio 0.5-2) ensure efficient current distribution and low forward voltage at electrode areas, while the overall structure maintains a large light-emitting area in the active region.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces a vertical dimension variation through the insulation layer thickness profile, creating a three-dimensional thickness distribution rather than a uniform two-dimensional structure. This vertical dimensionality allows the device to maintain large horizontal light-emitting area while providing optimized electrical characteristics at electrode contact points through controlled thickness variations.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design improves current density distribution, reduces forward voltage, and enhances light-emitting area, leading to increased efficiency and performance of the LED.

Implementation Method 1

a first electrode covering the plurality of first insulation layer outer openings and contacting the first semiconductor layer through the plurality of first insulation layer outer openings

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

a second electrode covering the second insulation layer opening

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 3

Light-Emitting Diode (LED) is a solid-state semiconductor light-emitting device

Methodology Applied
Scientific EffectLight emission from semiconductor: Light Emitting Diode

Implementation Method 4

Light-Emitting Diode (LED) is a solid-state semiconductor light-emitting device

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Data Source

PatentUS12604568B2Light-emitting device
Publication Date: 2026.04.14 ENNOSTAR CORP
  • US12604568B2 patent drawing
  • US12604568B2 patent drawing
  • US12604568B2 patent drawing

AI summary

A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer and a second semiconductor layer, wherein in a top view, the semiconductor stack comprises an outer peripheral region and an inner region, the outer peripheral region exposes the first semiconductor layer, and the second semiconductor layer is disposed in the inner region; an outer insulated structure comprising an insulation layer and a protective layer, the insulation layer comprising a plurality of first insulation layer outer openings and a second insulation layer opening; a first electrode covering the plurality of first insulation layer outer openings; and a second electrode covering the second insulation layer opening, wherein the outer insulated structure comprises a total thickness gradually decreasing from the outer peripheral region to the inner region.