Flip-Chip LED With Undoped Layer for Heat Dissipation
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Solution Overview
Problem
Vertical LED apparatuses face issues such as breakage due to differences in expansion coefficients between bonding wires and sealants, uneven phosphor distribution, and limited chip density, which affect heat dissipation and luminous intensity.
Innovation Solution
The LED design incorporates a semiconductor stacked structure with a substrate, multiple electrodes, and an undoped semiconductor layer to facilitate flip-chip bonding, eliminating the need for bonding wires and allowing for increased chip density and improved heat dissipation, while a roughened structure enhances light emitting efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bonding wire is used to electrically connect LED chip to carrier board, then electrical connection is achieved, but breakage easily occurs due to difference in expansion coefficient between bonding wire and sealant
Solution Approach 1:
The patent removes the bonding wire from the system entirely by using a wireless vertical LED structure. The LED chip is directly mounted on the carrier board through flip-chip bonding, eliminating the bonding wire that causes expansion coefficient mismatch and subsequent breakage. This extraction of the problematic component directly resolves the reliability issue.
Solution Approach 2:
The patent replaces the mechanical bonding wire connection with a direct electrical connection through conductive pads and through-silicon vias. Instead of using a separate bonding wire component, the electrical connection is integrated into the substrate structure, eliminating the mechanical stress points that lead to failure.
2Reliability
If bonding wire and LED chip have excessively large thickness, then electrical connection is established, but uneven distribution of phosphor in sealant occurs due to natural deposition
Solution Approach 1:
By removing the bonding wire and sealant assembly from the design, the patent eliminates the space between the LED chip and carrier board where phosphor distribution issues occur. The wireless structure allows for more precise control of phosphor placement directly on the LED chip surface, ensuring uniform distribution.
Solution Approach 2:
The patent transitions from a vertical stacking approach with bonding wire to a planar integration approach where the LED chip is flipped and bonded directly to the carrier board. This dimensional reconfiguration reduces the vertical distance and eliminates the sealant layer, preventing phosphor deposition issues.
3Quantity of substance
If bonding wire is used for electrical connection, then LED chip can be connected to carrier board, but density of LED chips cannot be further decreased
Solution Approach 1:
The patent merges the electrical connection function with the mounting structure by integrating conductive pads and through-silicon vias directly into the carrier board. This consolidation eliminates the separate bonding wire component, allowing for higher chip density as the connection structure becomes part of the substrate rather than an additional element.
Solution Approach 2:
By extracting the bonding wire from the system and replacing it with direct pad-to-pad connections through the substrate, the patent reduces the overall structure complexity. This enables closer spacing of LED chips and higher integration density without the mechanical constraints of wire bonding.
4Temperature
If vertical LED apparatus structure is used, then heat dissipation is improved, but breakage occurs due to expansion coefficient difference
Solution Approach 1:
The patent removes the bonding wire and sealant assembly that cause expansion coefficient mismatch while preserving the vertical mounting structure for heat dissipation. The direct flip-chip bonding approach maintains thermal contact between the LED chip and carrier board heat sink without introducing the problematic intermediate layers.
Solution Approach 2:
The patent uses composite material structures in the carrier board with integrated conductive paths and thermal management layers. The carrier board combines electrically conductive materials with thermally conductive properties, achieving both electrical connection and heat dissipation without relying on bonding wire-sealant combinations that cause reliability issues.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances device reliability by preventing breakage and uneven phosphor distribution, increasing chip density, and improving light emitting efficiency.
Implementation Method 1
A light emitting diode (LED) is a semiconductor device constituted mainly by group III-V compound semiconductor materials. Since such semiconductor materials have a characteristic of converting electricity into light, when a current is applied to the semiconductor materials, electrons and holes therein would be combined and release excessive energy in a form of light
Data Source
AI summary
A light emitting diode includes a semiconductor stacked structure, a substrate, a first electrode, a second electrode and a third electrode. The semiconductor stacked structure includes a first semiconductor layer, a second semiconductor layer and a light emitting layer. An undoped semiconductor layer over the first semiconductor layer may be not removed or not completely removed to increase the strength of the semiconductor stacked structure and improve the reliability of the LED and the production yields of manufacturing process. A roughened structure (or a photonic crystal) can be formed on the undoped semiconductor layer when the semiconductor stacked structure to improve the light emitting efficiency of the LED.