Flip Chip Bump Stress Isolation via Metal Interlayer

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Solution Overview

Problem

In flip chip packaging, the size and structure of solder bumps can lead to mechanical and thermal stress-induced damage to the isolation layer, necessitating additional protection layers that increase costs and complexity.

Innovation Solution

A flip chip package structure featuring a pad with an isolation layer having a through hole exposing a portion of the pad, covered by a metal layer that fully covers the exposed surface and supports a bump with side edges not contacting the isolation layer, ensuring electrical and mechanical connectivity while preventing damage to the isolation layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If solder bumps are used to connect the chip to the substrate, then electrical and mechanical connectivity is achieved, but mechanical and thermal stress can cause damage to the isolation layer

Engineering Contradiction:
Improveelectrical and mechanical connectivityVSAvoidisolation layer damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A metal layer is introduced as an intermediary between the bump and the isolation layer. This metal layer absorbs mechanical and thermal stress, preventing it from reaching and damaging the isolation layer, while still maintaining electrical connectivity between the bump and the underlying pad structure

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The metal layer is positioned beforehand to cushion and absorb the mechanical and thermal stress that will be generated during operation. This preventive measure protects the isolation layer from stress-induced damage before it occurs

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If additional protection layers are added to prevent isolation layer damage, then reliability is improved, but manufacturing cost and structural complexity increase

Engineering Contradiction:
Improveisolation layer protectionVSAvoidpackage structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The metal layer serves multiple functions simultaneously: it provides electrical connectivity, acts as a stress-absorbing protective layer, and eliminates the need for separate protection layers. This multi-functionality reduces overall package complexity while maintaining reliability

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The protective function is merged into the existing metal layer structure rather than being implemented as a separate protection layer. This integration eliminates redundant structures and reduces manufacturing complexity while still providing the necessary protection

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9735122B2Flip chip package structure and fabrication process thereof
Publication Date: 2017.08.15 SILERGY SEMICON TECH (HANGZHOU) CO LTD
  • US9735122B2 patent drawing
  • US9735122B2 patent drawing
  • US9735122B2 patent drawing

AI summary

Disclosed herein are various chip packaging structures and methods of fabrication. In one embodiment, a flip chip package structure can include: (i) a pad on a chip; (ii) an isolation layer on the chip and the pad, where the isolation layer includes a through hole that exposes a portion of an upper surface of the pad; (iii) a metal layer on the pad, where the metal layer fully covers the exposed upper surface portion of the pad; and (iv) a bump on the metal layer, where side edges of the bump do not make contact with the isolation layer.