Flip-Chip Micro-LED Mesa Structure for Faster Display Assembly
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Solution Overview
Problem
The existing methods for assembling micro-light emitting diode (micro-LED) displays, such as the pick-and-place approach, are inefficient due to the small size of the LEDs, leading to manufacturing errors and challenges in maximizing light-emitting area and handling efficiency.
Innovation Solution
A thin film flip-chip (TFFC) design for micro-LEDs with a mesa structure that includes a p-contact layer contacting a p-type layer, a cathode contacting a sidewall of an n-type layer, and an anode contacting the top surface of the p-contact layer, with dielectric materials insulating the contacts to enhance light extraction and handling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If pick-and-place approach is used to assemble micro-LED displays, then individual micro-LEDs can be positioned on backplane, but assembly process becomes slow and subject to manufacturing errors
Solution Approach 1:
The patent merges multiple micro-LEDs into a single integrated chip structure with shared electrodes and common regions, eliminating the need for individual pick-and-place operations. The combined chip allows all micro-LEDs to be assembled simultaneously as one unit, dramatically improving assembly speed while maintaining precision through the integrated design.
Solution Approach 2:
The patent performs preliminary actions by pre-structuring the micro-LED array with formed electrodes, dielectric regions, and conductive paths before assembly. The backplane is also prepared in advance with corresponding electrode patterns, enabling direct integration without time-consuming alignment and attachment operations during final assembly.
2Measurement precision
If micro-LED die size is decreased to satisfy increasing resolution requirements, then display resolution improves, but larger and larger numbers of die must be transferred at each pick and place operation
Solution Approach 1:
The patent combines multiple small micro-LED dies into a single integrated chip structure, effectively reducing the number of transfer operations needed. By merging adjacent micro-LEDs with shared electrodes and common dielectric regions, the system transfers fewer larger units instead of many small individual dies, simplifying the assembly process while maintaining high resolution.
Solution Approach 2:
The patent transitions from transferring individual micro-LED dies in a planar arrangement to transferring integrated chip structures that combine multiple dies vertically and laterally. This dimensional reorganization allows the system to handle fewer units with the same or higher effective resolution by stacking and combining multiple LED elements within a single chip footprint.
3Power
If thin film flip-chip design is used for micro-LEDs, then forward voltage is lower and current drive capability is higher, but dimensional down-scaling is more difficult compared to vertical thin film design
Solution Approach 1:
The patent applies local quality by implementing the thin film flip-chip architecture selectively in regions where high current drive capability is needed, while using vertical thin film structures in regions requiring extreme miniaturization. The design allows different structural configurations within the same device array, optimizing each region's performance characteristics based on its specific requirements.
Solution Approach 2:
The patent changes key structural parameters of the thin film flip-chip design, including electrode thickness, dielectric layer dimensions, and contact geometry, to enable dimensional down-scaling. By adjusting these parameters, the design maintains the electrical performance advantages of flip-chip architecture while reducing the physical footprint to compete with vertical thin film structures.
Data Source
AI summary
A micro-light emitting diode (uLED) device comprises: a mesa comprising: a plurality of semiconductor layers including an n-type layer, an active layer, and a p-type layer; a p-contact layer contacting the p-type layer; a cathode contacting the first sidewall of the n-type layer; a first region of dielectric material that insulates the p-contact layer, the active layer, and a first sidewall of the p-type layer from the cathode; an anode contacting the top surface of the p-contact layer; and a second region of dielectric material that insulates the active layer, a second sidewall of the p-type layer, and the second sidewall of the n-type layer from the anode. The top surface of the p-contact layer has a different planar orientation compared to the first and second sidewalls of the n-type layer. Methods of making and using the uLED devices are also provided.