Flip-Chip Package Structure for Integrated Switching Power Supply
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Solution Overview
Problem
Existing switching power supply package structures face inefficiencies due to parasitic resistances and inductances introduced by bonding wires, limiting current density and switching frequency, and requiring improved electrical and thermal properties for stable voltage regulation in low-power devices.
Innovation Solution
A flip-chip package structure with a redistribution layer and lead frame is used to integrate switching power supply components, eliminating bonding wires and optimizing electrode distribution, which reduces parasitic resistances and inductances, enhancing current carrying capability and efficiency by concentrating polarities and using larger metal layers for reduced resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bonding wires are used to connect power supply components, then electrical connectivity is achieved, but parasitic resistances and inductances increase, limiting current density and switching frequency
Solution Approach 1:
The patent extracts and eliminates the bonding wire interconnects from the power supply structure. By removing these high-parasitic elements, the design achieves direct metal-to-metal bonding between power components, thereby eliminating the source of parasitic resistances and inductances while maintaining electrical connectivity through alternative direct bonding mechanisms
Solution Approach 2:
The patent transitions from planar bonding wire connections to three-dimensional direct bonding architecture. By stacking power components vertically and establishing direct metallurgical bonds between adjacent layers, the design eliminates the need for wire bonds and reduces current path length, thereby minimizing parasitic effects
2Ease of manufacture
If bonding wires are used for component connection, then assembly is simplified, but current carrying capability is reduced due to higher resistance
Solution Approach 1:
The patent removes bonding wires from the assembly process entirely. By implementing direct bond bonding (DBB) technology where metal layers are directly bonded to each other through diffusion bonding or eutectic bonding, the design eliminates the wire bonding step while simultaneously achieving lower resistance connections that enhance current carrying capability
Solution Approach 2:
The patent employs composite metallurgical structures with multiple metal layers and bonding interfaces designed to optimize both electrical performance and manufacturability. The direct bond structure uses carefully selected metal combinations that provide both ease of fabrication and superior electrical conductivity for high current applications
3Ease of manufacture
If conventional package structures are used, then manufacturing is straightforward, but thermal stability and voltage regulation performance are insufficient for low-power devices
Solution Approach 1:
The patent segments the power supply into functionally independent but closely coupled modules (power management IC, power inductor, ceramic capacitors) that are vertically stacked and directly bonded. This segmentation allows each component to be optimized for its specific function while maintaining compact thermal and electrical pathways for superior voltage regulation
Solution Approach 2:
The patent merges multiple discrete power supply components into a single integrated flip-chip package. By combining the PMIC, inductor, and capacitors into one compact module with direct internal bonding, the design achieves improved thermal stability and voltage regulation while maintaining manufacturing efficiency through standardized packaging processes
Data Source
AI summary
Disclosed are flip-chip package structures and methods for an integrated switching power supply. In one embodiment, a flip-chip package structure can include: (i) a die with an integrated switching power supply, where a first surface of the die includes first bumps with different polarities; (ii) a redistribution layer including redistribution layer units, each having a first surface to connect bumps with a same polarity from the first bumps, the redistribution layer having a second surface including second bumps to redistribute polarities; (iii) a lead frame having pins, where a first surface of the lead frame can connect bumps with a same polarity from the second bumps; and (iv) a flip-chip package configured to package the die, the redistribution layer, the first and second bumps, and the lead frame, where a second surface of the lead frame provides electrical connectivity between the integrated switching power supply and a PCB.