Leakage-Compensated Flip-Flop Circuit for Stable Low-Power Data Storage

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Solution Overview

Problem

Conventional flip-flop circuits face issues with high power consumption and area usage due to the presence of passgates and inverters, leading to unstable voltage and incorrect data values, and lack of feedback structures which affect their performance.

Innovation Solution

The proposed flip-flop circuit design includes a passgate coupled between the data input and a first node, a passgate inverter between the nodes, and an inverter connected to the data output, along with leakage compensation units to stabilize voltages and reduce power consumption by compensating for leakage currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional passgates and inverters are used in flip-flop circuits, then the circuit can store and transfer data, but power consumption increases and voltage becomes unstable

Engineering Contradiction:
Improvevoltage stabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent removes the inverter component from the conventional flip-flop circuit structure. By extracting the inverter, the circuit reduces power consumption and eliminates the source of voltage instability while maintaining data storage functionality through the passgate and feedback mechanism

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements a feedback structure where the output of the passgate is fed back to control the passgate's operation. This feedback mechanism stabilizes the voltage at the first node and ensures reliable data storage without requiring additional inverters

Inventive Principle:
Principle #23Feedback

2Reliability

If conventional flip-flop structures are used, then data storage is achieved, but area usage increases

Engineering Contradiction:
Improvedata storage accuracyVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the data storage and control functions into a single integrated structure using the passgate with feedback. This consolidation eliminates the need for separate inverters and reduces the overall circuit area while maintaining data storage reliability

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

By removing the inverter component from the conventional structure, the patent reduces the circuit area occupied by the flip-flop while preserving the essential data storage functionality through the simplified passgate-based design

Inventive Principle:
Principle #2Taking out (Extraction)

3Device complexity

If conventional passgates are used without leakage compensation, then circuit simplicity is maintained, but voltage becomes unstable due to leakage currents

Engineering Contradiction:
Improvecircuit structureVSAvoidvoltage stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent uses feedback to continuously monitor and adjust the voltage at the first node, compensating for leakage currents without adding complex external compensation circuits. The feedback signal adjusts the passgate operation to maintain stable voltage levels

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The circuit uses its own output signal to control its operation through feedback, enabling self-compensation for leakage effects. The passgate automatically adjusts its operation based on the feedback from its own output, maintaining voltage stability without external intervention

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10715119B2Low power flip-flop circuit
Publication Date: 2020.07.14 INTELLINK INC
  • US10715119B2 patent drawing
  • US10715119B2 patent drawing
  • US10715119B2 patent drawing

AI summary

Aspects for a flip-flop circuit are described herein. As an example, the aspects may include a passgate, a passgate inverter, a leakage compensation unit, and an inverter. The passgate may be coupled between a flip-flop data input terminal and a first node. The passgate inverter and the inverter may be sequentially connected between the first node and a flip-flop data output terminal. The leakage compensation unit may be connected between the first node and the flip-flop data output terminal parallel to the passgate inverter and the inverter.