Redundant Flip-Flop Latches With Majority Voting for Soft Errors
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Solution Overview
Problem
Integrated circuits (ICs) are vulnerable to soft errors caused by radiation, leading to temporary but potentially destructive changes in transistor states, especially in mission-critical operations where downtime can be detrimental.
Innovation Solution
The implementation of soft error tolerant flip flops using a triple modular redundancy scheme with redundant latches and a majority voter to detect and correct errors in real time, reducing system operating speed degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If transistors are reduced in size to increase integration density, then more transistors can be integrated at lower threshold voltages, but the IC becomes more vulnerable to soft errors from radiation
Solution Approach 1:
The patent implements triple modular redundancy by creating three identical copies of the flip-flop circuit. Each copy processes the same input data independently, and their outputs are fed to a majority voter. This copying strategy ensures that if one copy suffers a soft error, the other two copies can still produce the correct output, thereby maintaining reliability while allowing continued scaling for integration density
Solution Approach 2:
The patent changes the operational parameters of the flip-flop by introducing multiple redundant instances and modifying the decision logic through a majority voter circuit. Instead of relying on a single flip-flop's state, the system now requires a majority vote (2 out of 3) to determine the output state, effectively changing the parameter of decision-making from single-instance to multi-instance consensus, which increases soft error tolerance
2Reliability
If triple modular redundancy with majority voter is implemented, then soft error detection and correction capability is improved, but device complexity increases
Solution Approach 1:
The patent segments the original flip-flop function into three independent identical modules, each capable of independent operation. This segmentation allows the system to distribute the computational workload and error susceptibility across multiple independent units, with a separate majority voter module that consolidates their outputs. The segmentation makes the complexity manageable by organizing it into modular, repeatable units
Solution Approach 2:
The three redundant flip-flop copies are universal in design, each performing the exact same function with identical structure. This universality allows for standardized fabrication and simplifies the overall system design, as the same circuit template is replicated three times. The majority voter also serves a universal function of error correction across different input scenarios
3Reliability
If triple modular redundancy scheme is used, then real-time error detection and correction is achieved, but system operating speed may be degraded
Solution Approach 1:
The patent maintains continuous operation by having all three flip-flop copies process data simultaneously in parallel, rather than sequentially. The majority voter continuously receives inputs from all three copies and continuously produces the corrected output. This parallel continuous processing ensures that error detection and correction occur in real-time without interrupting the data flow or requiring pause for error checking, thus minimizing speed degradation
Data Source
AI summary
A register designed to detect and correct soft errors in real time. A redundant latch is added to the existing structure of a flip flop and functional data is simultaneously registered at multiple latches. The content of these multiple latches are fed to a majority voting circuit. If the content of any of these latches is corrupted by soft error, it is filtered out through the majority voting circuit and correct data is passed out from the output of the flip flop. In one embodiment, this design operates as a simple scan flip flop or scan-hold flip flop, and is useful for system testability purposes.


