Flipped-Gate Voltage Reference Circuit for Substrate Noise Isolation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing voltage reference circuits using bipolar junction transistors (BJTs) and complementary metal oxide semiconductor (CMOS) devices are susceptible to substrate noise, leading to temperature-dependent reference voltages, which affect their accuracy and reliability.
Innovation Solution
A voltage reference circuit utilizing a flipped-gate transistor with an anti-doped gate electrode and a non-flipped-gate transistor, coupled through current mirrors, achieves a zero-temperature coefficient (ZTC) operating point by adjusting the current ratio between these transistors, ensuring temperature independence of the reference voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bipolar junction transistors (BJTs) are used to form bandgap references, then a reference voltage can be provided, but the circuit becomes sensitive to substrate noise (majority carrier noise in PNP BJTs or minority carrier noise in NPN BJTs)
Solution Approach 1:
The patent introduces an anti-doped gate electrode as an intermediary layer between the substrate and the transistor channel. This gate electrode, doped with the same type as the substrate, acts as a mediator that blocks noise propagation from the substrate to the transistor, thereby reducing substrate noise sensitivity while maintaining reference voltage stability
Solution Approach 2:
The patent extracts the gate electrode from its conventional configuration and repositions it between the substrate and the channel. By taking out the gate electrode and placing it in this intermediate position with anti-doping relative to the channel (but same doping as substrate), it creates a noise-blocking barrier that separates the transistor from substrate noise
2Object-affected harmful factors
If CMOS devices are fabricated in a triple well flow with reverse-junction-isolation, then isolation from substrate noise is improved, but device complexity and manufacturing complexity increase
Solution Approach 1:
The patent segments the transistor structure by introducing a distinct anti-doped gate electrode layer between the substrate and the channel. This segmentation creates a separate functional layer that specifically addresses noise isolation without requiring the complex triple well structure, thereby reducing device complexity while maintaining noise isolation benefits
Solution Approach 2:
Instead of using reverse-junction-isolation with differently doped wells (triple well), the patent inverts the approach by using an anti-doped gate electrode with the same doping type as the substrate. This inverted doping strategy achieves noise isolation through the gate electrode's positioning and doping configuration rather than through complex well structures
Data Source
AI summary
Voltage reference circuits are provided. A voltage reference circuit includes a transistor, a flipped-gate transistor, a first current mirror unit, a second current mirror unit, and an output note. A gate and a drain of the flipped-gate transistor are coupled to a gate and a drain of the transistor. A bulk and a source of the flipped-gate transistor are coupled to a ground. The first current mirror unit is configured to provide a first current to the flipped-gate transistor and a mirroring current in response to a bias current. The second current mirror unit is configured to drain a second current from the first transistor in response to the mirroring current. The output node is coupled to a source of the transistor and the second current mirror unit, and configured to output a reference voltage. Size of the flipped-gate transistor is less than that of the first transistor.