Flipped-Gate Voltage Reference for Substrate Noise Immunity
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Solution Overview
Problem
Conventional voltage reference circuits using bipolar junction transistors (BJTs) and CMOS devices are susceptible to substrate noise, which affects the accuracy of the reference voltage, especially at higher temperatures, due to lack of full isolation from substrate noise.
Innovation Solution
A voltage reference circuit utilizing a flipped gate transistor with an anti-doped gate electrode and a sizing arrangement between transistors to produce a temperature-independent reference voltage, including a current mirroring system and a leakage compensation transistor to maintain accuracy across varying temperatures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If bipolar junction transistors (BJTs) are used to form bandgap references, then a reference voltage signal can be provided, but the circuit becomes susceptible to substrate noise (majority carrier noise in PNP or minority carrier noise in NPN)
Solution Approach 1:
The patent segments the transistor structure by flipping the gate to the substrate side, creating distinct regions for noise immunity and electrical function. This segmentation isolates the sensitive channel region from substrate noise while maintaining the necessary electrical characteristics for reference voltage generation.
Solution Approach 2:
The patent applies inversion by flipping the gate electrode from its conventional position to the substrate side, creating a flipped-gate transistor structure. This inversion fundamentally changes the device characteristics to achieve substrate noise immunity while maintaining functional performance.
2Device complexity
If conventional CMOS devices are used without special isolation, then device complexity is reduced, but substrate noise affects the reference voltage accuracy
Solution Approach 1:
Instead of adding complex isolation structures around conventional transistors, the patent inverts the transistor structure itself by flipping the gate to the substrate side. This approach achieves noise immunity through structural inversion rather than external isolation, simplifying the overall design.
3Temperature
If transistor sizing is adjusted to compensate for leakage current variations with temperature, then reference voltage temperature independence is improved, but device complexity increases
Solution Approach 1:
The patent changes the physical parameters of the transistors by flipping the gate structure, which fundamentally alters the leakage current characteristics. This parameter change enables temperature compensation through simplified sizing arrangements rather than complex control circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a temperature-independent reference voltage with improved accuracy and reduced susceptibility to substrate noise, maintaining accuracy even at temperatures above 80°C by tuning the transistor sizes and using current mirroring and leakage compensation.
Implementation Method 1
A voltage reference circuit utilizing a flipped gate transistor with an anti-doped gate electrode
Implementation Method 2
including a current mirroring system and a leakage compensation transistor to maintain accuracy across varying temperatures
Implementation Method 3
including a current mirroring system and a leakage compensation transistor to maintain accuracy across varying temperatures
Data Source
AI summary
A voltage reference includes a flipped gate transistor configured to receive a first current. The voltage reference further includes a first transistor configured to receive a second current, the first transistor having a first leakage current, wherein the first transistor is connected with the flipped gate transistor in a Vgs subtractive arrangement. The voltage reference further includes an output node configured to output a reference voltage, the output node connected to the first transistor. The voltage reference further includes a second transistor connected to the output node, the second transistor having a second leakage current, wherein the first leakage current is substantially equal to the second leakage current.


