Floating Body Transistor Memory Without DRAM Capacitors

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Solution Overview

Problem

Current semiconductor memory devices face challenges in achieving efficient data storage with reduced power consumption and increased density, particularly in volatile memory types like DRAM, where the electrically floating body effect is not fully utilized for bi-stability and non-volatile data retention.

Innovation Solution

A semiconductor memory cell design featuring a floating body region with two stable states, utilizing a back bias to form a depletion region and incorporating a bi-stable floating body transistor and a non-volatile memory element connected in series, allowing for data storage and retrieval without continuous power supply.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If conventional DRAM cell design with capacitor is used, then data storage capability is achieved, but cell size is large and scaling is difficult

Engineering Contradiction:
Improvememory cell sizeVSAvoiddata storage capability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent removes the capacitor component from the conventional 1T1C DRAM cell structure, extracting only the essential storage function through the floating body transistor's bi-stable operation. This eliminates the need for separate capacitor structures, enabling smaller cell sizes while maintaining data storage capability through the floating body's charge state.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The floating body transistor serves multiple functions simultaneously: it acts as the storage element through its bi-stable operation, eliminates the need for separate access transistor in 1T configuration, and provides natural charge retention without capacitor. This multi-functionality reduces overall cell complexity and size.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Duration of action of stationary object

If continuous power supply is provided to maintain data in volatile memory, then data retention is ensured, but power consumption increases

Engineering Contradiction:
Improvedata retention timeVSAvoidpower consumption
Core Design Contradiction:
Duration of action of stationary objectVSUse of energy by stationary object

Solution Approach 1:

The floating body transistor maintains its charge state through self-service mechanisms where the floating body naturally retains charge through its isolated structure. The bi-stable operation allows the cell to maintain data state without continuous external power intervention, reducing power consumption while ensuring data retention through the inherent charge storage capability of the floating body.

Inventive Principle:
Principle #25Self-service

3Stability of the object's composition

If floating body effect is utilized for bi-stability, then non-volatile data retention is achieved, but device complexity increases

Engineering Contradiction:
Improvebi-stabilityVSAvoidstructure complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent merges the storage function and access function into a single floating body transistor structure. The floating body region serves as both the storage element and the channel region, eliminating the need for separate access transistor and capacitor structures. This merging reduces device complexity while achieving bi-stability and non-volatile data retention.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables bi-stable operation and non-volatile data retention, enhancing memory density and reducing power consumption by leveraging the electrically floating body effect, thus improving the performance of semiconductor memory devices.

Implementation Method 1

utilizing a back bias to form a depletion region

Methodology Applied
Scientific EffectDepletion region formation: Electric Field

Implementation Method 2

A memory device comprising an electrically floating body transistor... a floating body region configured to be charged to a level indicative of a state of the memory cell selected from at least first and second states

Methodology Applied
Scientific EffectElectrically floating body effect: Electrical Accumulator

Data Source

PatentUS11882684B2Memory device comprising an electrically floating body transistor
Publication Date: 2024.01.23 ZENO SEMICONDUCTOR INC
  • US11882684B2 patent drawing
  • US11882684B2 patent drawing
  • US11882684B2 patent drawing

AI summary

A semiconductor memory cell having an electrically floating body having two stable states is disclosed. A method of operating the memory cell is disclosed.