Floating-Gate Capacitor Leakage Reduction via Silicide-Block Dielectric
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Solution Overview
Problem
Conventional capacitor dielectric films in analog integrated circuits exhibit leakage over time, making it challenging to maintain precise and stable reference voltages, especially in high-precision applications like ADCs and DACs, which require long-term stability and minimal power consumption.
Innovation Solution
A programmable floating-gate element is implemented using a silicide-block silicon dioxide film to protect the floating gate electrode, allowing for high capacitance per unit area without altering existing circuit elements, and utilizing tunnel capacitors for precise charge programming and erasure, enabling efficient trimming of capacitors directly in the reference circuit amplifier.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional capacitor dielectric films are used in floating-gate capacitors, then the manufacturing process is simpler, but charge leakage occurs over time reducing long-term stability
Solution Approach 1:
The patent employs a composite dielectric structure consisting of multiple layers: a first dielectric layer (e.g., silicon dioxide) and a second dielectric layer (e.g., silicon nitride) deposited over it. This composite structure combines the advantages of different materials to achieve both low leakage current and compatibility with standard CMOS fabrication processes, thereby resolving the contradiction between ease of manufacture and charge retention stability.
Solution Approach 2:
The tunnel oxide layer serves as an intermediary between the floating gate electrode and the conventional capacitor dielectric. This thin oxide layer enables Fowler-Nordheim tunneling for charge programming while blocking charge leakage, acting as a mediator that allows the use of conventional dielectric materials while maintaining long-term charge retention stability.
2Reliability
If additional dielectric films and conductor layers are deposited for programmable capacitors, then charge retention stability is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent designs the floating gate electrode to serve multiple functions: it acts as both the control electrode for the MOS transistor and as one plate of the programmable capacitor. The gate dielectric layer serves dual purposes as the transistor gate oxide and as part of the capacitor dielectric structure. This multi-functionality reduces the number of additional layers and processes needed, resolving the contradiction between improved charge retention and reduced device complexity.
Solution Approach 2:
The patent merges the transistor gate structure with the capacitor structure by using the same floating gate electrode and gate dielectric layer for both functions. This consolidation eliminates the need for separate capacitor plates and dielectric layers, thereby maintaining charge retention stability while reducing overall device complexity and manufacturing steps.
3Measurement precision
If floating-gate techniques are used to trim capacitors directly, then trimming precision is improved, but power consumption increases
Solution Approach 1:
The patent implements trimming by programming the floating gate capacitor during the manufacturing process using Fowler-Nordheim tunneling, before the device is put into operation. This preliminary action sets the precise capacitance value once, eliminating the need for continuous power consumption during operation to maintain the trimmed state, thereby resolving the contradiction between trimming precision and power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution provides a stable and precise reference voltage with minimal power consumption, maintaining long-term charge retention and reducing the need for additional costly processes, while being compatible with existing manufacturing flows and high-voltage circuit applications.
Implementation Method 1
Programming of the device is accomplished through such mechanisms as Fowler-Nordheim tunneling
Implementation Method 2
A programmable floating-gate element is implemented using a silicide-block silicon dioxide film to protect the floating gate electrode
Data Source
AI summary
An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, and includes portions serving as a transistor gate electrode, a plate of a metal-to-poly storage capacitor, and a plate of poly-to-active tunneling capacitors. Silicide-block silicon dioxide blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit are silicide-clad.