Floating Gate Charge Compensation Circuit for Analog Accuracy
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Solution Overview
Problem
Analog floating gate circuits face challenges in maintaining accuracy due to unintended charge loss from floating gates, which affects the precision and longevity of analog circuits, particularly in low-power applications like voltage reference circuits, where complex compensation methods or reprogramming are often necessary.
Innovation Solution
The implementation of a compensation circuit that includes passive and active components to manage charge loss on floating gates, using tunneling regions and storage capacitors to maintain a stable voltage, thereby reducing the need for complex circuitry and recalibration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If floating gate circuits are used for low-power analog applications, then power consumption is reduced, but charge loss occurs leading to accuracy degradation
Solution Approach 1:
The compensation circuit automatically detects and corrects charge loss on the floating gate through self-regulation. The circuit monitors the voltage on the floating gate and activates tunneling regions to replenish lost charge without requiring external intervention or complex reprogramming procedures, enabling the system to maintain accuracy autonomously
Solution Approach 2:
The compensation circuit employs a feedback mechanism where the voltage on the floating gate is continuously monitored and compared against reference levels. When charge loss is detected, the feedback signal triggers the activation of tunneling regions to restore the correct charge level, creating a closed-loop control system that maintains accuracy
2Reliability
If complex compensation methods are used to maintain accuracy, then reliability is improved, but device complexity increases
Solution Approach 1:
The compensation circuit merges multiple functions into a single integrated structure. The tunneling regions serve dual purposes: they are part of the normal floating gate operation and simultaneously function as charge compensation mechanisms. This integration avoids the need for separate complex compensation circuits
Solution Approach 2:
The compensation circuit introduces an intermediary control mechanism that simplifies the overall system. Rather than requiring complex reprogramming procedures or external calibration equipment, a simple control voltage serves as an intermediary to activate the tunneling regions and restore charge, reducing operational complexity
3Reliability
If recalibration or reprogramming is performed to compensate for charge loss, then accuracy is maintained, but loss of time occurs
Solution Approach 1:
The compensation circuit enables continuous maintenance of floating gate charge without interrupting circuit operation. Unlike discrete recalibration procedures that require stopping the circuit, the compensation mechanism operates continuously or near-continuously, maintaining accuracy without time loss
Solution Approach 2:
The compensation circuit performs preliminary charge restoration before significant accuracy degradation occurs. By continuously monitoring and proactively replenishing charge through the tunneling regions, the circuit prevents the need for time-consuming corrective recalibration procedures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively compensates for charge loss over the circuit's lifetime, maintaining accuracy and reducing the need for recalibration or reprogramming, thus enhancing the practicality and reliability of precision analog floating gate circuits.
Implementation Method 1
A current tunnels from a first plate of capacitor 4A through a thin oxide (i.e., a 'tunnel oxide') to a second plate of capacitor 4A if sufficient voltage is applied across the tunneling oxide of capacitor 4A to cause charge to flow through its tunneling oxide
Implementation Method 2
Both options inject electrons onto floating gate 2, causing negative voltage bias thereon. However, using a P-channel transistor as floating gate transistor 9 allows use of a lower programming voltage
Data Source
AI summary
An analog floating gate circuit (10-3, 10-4) includes a first sense transistor (21, 3), a first storage capacitor (20, 5), and first (24, 4) and second (31A, 42) tunneling regions. Various portions of a first floating gate conductor (12, 2) form a floating gate of the first sense transistor, a floating first plate of the first storage capacitor (20, 5), a floating first plate of the first tunneling region, and a floating first plate of the second tunneling region, respectively. A second plate of the first storage capacitor is coupled to a first reference voltage (VREF, GND), and a second plate of the second tunneling region is coupled to a second reference voltage (VPROG/GND). Compensation circuitry (44-1, 44-2) is coupled to the first floating gate conductor, for compensating loss of trapped charge from the first floating gate conductor.