Floating-Gate FPAA Programming for Compact Large-Scale Analog Arrays
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Solution Overview
Problem
Current field-programmable analog arrays (FPAAs) are limited by their small size, restrictive interconnect designs, and lack of programmable elements, making them inefficient for large-scale analog signal processing and storage, which is necessary for modern electronic systems requiring dense, low-power, and high-speed signal processing.
Innovation Solution
A large-scale field-programmable analog array (FPAA) utilizing a floating-gate transistor array with programmable transistors as both switches and computational elements, allowing for on-chip programming of bias voltages, corner frequencies, and multiplier coefficients, enabling more flexible and compact analog circuit design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional MOS transistor switches are used in FPAAs, then interconnect capabilities are provided, but area efficiency is poor and additional physical memory elements are required
Solution Approach 1:
The patent merges the switch and memory element functions into a single floating-gate transistor. The floating-gate transistor serves dual purposes: it acts as a switch for interconnect capabilities and simultaneously stores the programming state, eliminating the need for separate physical memory elements and reducing overall chip area.
Solution Approach 2:
The floating-gate transistor is designed to perform multiple functions: it operates as a switch for signal routing, provides non-volatile memory storage through its floating-gate node, and enables programmable analog characteristics. This multi-functionality resolves the contradiction by providing interconnect capabilities without requiring additional dedicated memory elements.
2Speed
If Gm-C amplifiers and 4-transistor transconductors are used to improve switch characteristics, then bandwidth is increased, but area increases and additional memory elements are required
Solution Approach 1:
The patent combines the transconductor function with the switch function in the floating-gate transistor. By programming the floating-gate transistor's threshold voltage, it can operate as a voltage-controlled resistor or transconductor, providing high bandwidth characteristics without requiring separate Gm-C amplifiers or 4-transistor transconductors, thus reducing chip area.
Solution Approach 2:
The patent utilizes parameter changes in the floating-gate transistor's threshold voltage to achieve different operational modes. By adjusting the threshold voltage through programming, the transistor can provide high bandwidth when needed while maintaining compact area, as the same device structure provides both high-speed switching and programmable analog characteristics without requiring additional circuitry.
3Area of stationary object
If current FPAAs are made small and compact, then integration is improved, but programmable elements and interconnect capabilities are limited
Solution Approach 1:
The patent segments the FPAA into a regular array of floating-gate transistors that can be independently programmed. This segmentation allows for fine-grained reconfigurability where individual transistors or small groups can be programmed to create different circuit functions, providing high adaptability within a compact area as the segmented structure enables dense packing of programmable elements.
Solution Approach 2:
The patent employs parameter changes in the floating-gate transistors' threshold voltages to achieve programmable analog characteristics. By varying the threshold voltage of each transistor in the array, a wide range of analog functions can be implemented without increasing physical size, as the programming is achieved through electrical parameter modification rather than physical restructuring.
4Productivity
If analog circuits are designed for dense, low-power, and high-speed signal processing, then processing efficiency is improved, but development cycle increases and design complexity increases
Solution Approach 1:
The patent implements a dynamically reconfigurable analog circuit where the floating-gate transistors can be programmed after fabrication to change circuit topology and parameters. This dynamic reconfigurability allows the same hardware to be adapted for different signal processing applications, reducing development time as circuits can be reprogrammed rather than redesigned and refabricated, while maintaining high processing efficiency through optimized analog implementations.
Data Source
AI summary
A large-scale field-programmable analog array (FPAA) for rapidly prototyping analog systems and an arbitrary analog waveform generator. The large-scale FPAA includes a floating-gate transistor array and a plurality of computational analog blocks (CABs), which may be adapted to set bias voltages for operational transconductance amplifiers (OTAs), adjust corner frequencies on the capacitively coupled current conveyors, set multiplier coefficients in vector-matrix multipliers, and a variety of other operations. The floating-gate transistors may be used as switch elements, programmable resistor elements, precision current sources, and programmable transistors. Accordingly, the floating-gate transistors within the array allow on-chip programming of the characteristics of the computational elements, while still maintaining compact CABs. The arbitrary analog waveform generator may include programmable floating-gate MOS transistors for use as analog memory cells to store samples of the waveforms.