Floating-Gate Memory Doping Layout for Low-Voltage Programming
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing nonvolatile memory devices require high programming voltages, which consume significant power and are inefficient, due to the need for strong electric fields to inject hot electrons into floating gates.
Innovation Solution
Incorporating a doped region between the source and drain, with a floating gate over a p-well in a substrate, enhances impact ionization and hot electron injection, allowing for lower programming voltages and increased threshold voltage windows through the use of n-doped sources and drains, as well as halo regions and doped silicon germanium regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high voltage is applied to create a strong electric field for hot electron injection, then programming efficiency is improved, but power consumption increases
Solution Approach 1:
The patent introduces a doped region with specific doping concentration (1E16 to 1E18 atoms/cm³) located between the source and drain, creating a localized area with enhanced impact ionization properties. This localized modification allows hot electron generation in a specific region without requiring high voltage across the entire device, thus improving programming efficiency while reducing overall power consumption.
Solution Approach 2:
The patent modifies the doping concentration parameter in the channel region by introducing a doped region with doping concentration between 1E16 to 1E18 atoms/cm³. This parameter change enhances impact ionization efficiency, allowing effective hot electron injection at lower voltages, thereby resolving the contradiction between programming efficiency and power consumption.
2Productivity
If high voltage is used for programming, then hot electron injection is achieved, but device reliability deteriorates
Solution Approach 1:
By creating a localized doped region between source and drain with specific doping characteristics, the patent confines the high electric field and hot electron generation to a small region. This prevents excessive stress on other device components, maintaining device reliability while achieving effective hot electron injection for programming.
Solution Approach 2:
The doped region acts as an intermediary structure that facilitates hot electron generation through enhanced impact ionization. It mediates between the applied voltage and the floating gate, enabling efficient electron injection without requiring high voltage that would compromise device reliability.
3Productivity
If a doped region is added between source and drain, then impact ionization is enhanced, but device complexity increases
Solution Approach 1:
The doped region is integrated into the existing transistor structure between the source and drain regions. By merging this additional functional element with the conventional device architecture, the patent achieves enhanced impact ionization without proportionally increasing overall device complexity. The doped region shares space and fabrication processes with existing structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves programming efficiency, reduces power consumption, and enhances device reliability by enabling hot electron injection with lower voltages and maintaining current through a channel with a lower doped p-well.
Implementation Method 1
the doped region enhances impact ionization and hot electron injection to the floating gate
Implementation Method 2
A strong vertically oriented electric field in a channel region between the source and the drain may be created resulting in injection of hot electrons to an edge portion of the floating gate from the channel region
Implementation Method 3
The n-well capacitor may be used to bias the floating gate through capacitive coupling as the floating gate is electrically insulated from external input nodes
Data Source
AI summary
A nonvolatile memory device is provided. The nonvolatile memory device comprises an n-doped source, an n-doped drain, and a doped region in a first p-well in a substrate. A floating gate may be arranged over the first p-well, whereby the doped region may be arranged at least partially under the floating gate.